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 M32C/88 Group (M32C/88T)
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
REJ03B0171-0110 Rev.1.10 Oct. 31, 2005
1. Overview
The M32C/88 Group (M32C/88T) microcomputer is a single-chip control unit that utilizes high-performance silicon gate CMOS technology with the M32C/80 Series CPU core. The M32C/88 Group (M32C/88T) is available in 144-pin and 100-pin plastic molded LQFP packages. With a 16-Mbyte address space, this microcomputer combines advanced instruction manipulation capabilities to process complex instructions by less bytes and execute instructions at higher speed. It includes a multiplier and DMAC adequate for office automation, communication devices and industrial equipments, and other high-speed processing applications.
1.1 Applications
Automobiles, audio, cameras, office equipment, communications equipment, portable equipment, etc.
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
1.2 Performance Overview
Tables 1.1 and 1.2 list performance overview of the M32C/88 Group (M32C/88T). Table 1.1 M32C/88 Group (M32C/88T) Performance (144-Pin Package)
Characteristic Basic Instructions Minimum Instruction Execution Time Operating Mode Address Space Memory Capacity Peripheral I/O Port Function Multifunction Timer CPU Intelligent I/O Performance 108 instructions 31.3 ns (f(BCLK)=32 MHz, VCC=4.2 V to 5.5 V) Single-chip mode 16 Mbytes See Table 1.3 123 I/O pins and 1 input pin Timer A: 16 bits x 5 channels, Timer B: 16 bits x 6 channels Three-phase motor control circuit Time measurement function or Waveform generating function: 16 bits x 8 channels Communication function (Clock synchronous serial I/O, Clock asynchronous serial I/O, HDLC data processing) 5 Channels Clock synchronous serial I/O, Clock asynchronous serial I/O, IEBus(1), I2C bus(2) 3 channels Supporting CAN 2.0B specification 10-bit A/D converter: 1 circuit, 34 channels 8 bits x 2 channels 4 channels Can be activated by all peripheral function interrupt sources Immediate transfer, Calculation transfer and Chain transfer functions CRC-CCITT 16 bits x 16 bits 15 bits x 1 channel (with prescaler) 40 internal and 8 external sources, 5 software sources Interrupt priority level: 7 4 circuits Main clock oscillation circuit(*), Sub clock oscillation circuit(*), On-chip oscillator, PLL frequency synthesizer (*)Equipped with a built-in feedback resistor. Ceramic resonator or crystal oscillator must be connected externally Main clock oscillation stop detect function On-chip (option) VCC=4.2 V to 5.5 V, (f(BCLK)=32 MHz) 28 mA (VCC=5 V, f(BCLK)=32 MHz) 10A (VCC=5 V, f(BCLK)=32 kHz, in wait mode) 5.0 V 0.5 V 100 times (all space) -40 to 85oC (T version) -40 to 105oC (U version) 144-pin plastic molded LQFP
Serial I/O
CAN Module A/D Converter D/A Converter DMAC DMAC II CRC Calculation Circuit X/Y Converter Watchdog Timer Interrupt Clock Generation Circuit
Oscillation Stop Detect Function Cold Start-up/Warm Start-up Determine Function Electrical Supply Voltage Charact- Power Consumption eristics Flash Program/Erase Supply Voltage Memory Program and Erase Endurance Operating Ambient Temperature Package
NOTES: 1. IEBus is a trademark of NEC Electronics Corporation. 2. I2C bus is a trademark of Koninklijke Philips Electronics N. V. All options are on a request basis.
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
Table 1.2 M32C/88 Group (M32C/88T) Performance (100-Pin Package)
Characteristic Basic Instructions Minimum Instruction Execution Time Operating Mode Address Space Memory Capacity Peripheral I/O Port Function Multifunction Timer CPU Intelligent I/O Performance 108 instructions 31.3 ns (f(BCLK)=32 MHz, VCC=4.2 V to 5.5 V) Single-chip mode 16 Mbytes See Table 1.3 87 I/O pins and 1 input pin Timer A: 16 bits x 5 channels, Timer B: 16 bits x 6 channels Three-phase motor control circuit Time measurement function or Waveform generating function: 16 bits x 8 channels Communication function (Clock synchronous serial I/O, Clock asynchronous serial I/O, HDLC data processing) 5 Channels Clock synchronous serial I/O, Clock asynchronous serial I/O, IEBus(1), I2C bus(2) 3 channels Supporting CAN 2.0B specification 10-bit A/D converter: 1 circuit, 34 channels 8 bits x 2 channels 4 channels Can be activated by all peripheral function interrupt sources Immediate transfer, Calculation transfer and Chain transfer functions CRC-CCITT 16 bits x 16 bits 15 bits x 1 channel (with prescaler) 40 internal and 8 external sources, 5 software sources Interrupt priority level: 7 4 circuits Main clock oscillation circuit(*), Sub clock oscillation circuit(*), On-chip oscillator, PLL frequency synthesizer (*)Equipped with a built-in feedback resistor. Ceramic resonator or crystal oscillator must be connected externally Main clock oscillation stop detect function On-chip (option) VCC=4.2 V to 5.5 V, (f(BCLK)=32 MHz) 28 mA (VCC=5 V, f(BCLK)=32 MHz) 10A (VCC=5 V, f(BCLK)=32 kHz, in wait mode) 5.0 V 0.5 V 100 times (all space) -40 to 85oC (T version) -40 to 105oC (U version) 100-pin plastic molded LQFP
Serial I/O
CAN Module A/D Converter D/A Converter DMAC DMAC II CRC Calculation Circuit X/Y Converter Watchdog Timer Interrupt Clock Generation Circuit
Oscillation Stop Detect Function Cold Start-up/Warm Start-up Determine Function Electrical Supply Voltage Charact- Power Consumption eristics Flash Program/Erase Supply Voltage Memory Program and Erase Endurance Operating Ambient Temperature Package NOTES:
1. IEBus is a trademark of NEC Electronics Corporation. 2. I2C bus is a trademark of Koninklijke Philips Electronics N. V. All options are on a request basis.
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
1.3 Block Diagram
Figure 1.1 shows a block diagram of the M32C/88 Group (M32C/88T) microcomputer.
8
8
8
8
8
8
8
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
Peripheral Functions
Timer (16 bits) Timer A: 5 channels Timer B: 6 channels Three-Phase Motor Control Circuit Watchdog Timer (15 bits) D/A Converter: 8 bits X 2 channels
A/D Converter: 1 circuit Standard: 10 inputs Maximum: 34 inputs(2) UART/Clock Synchronous Serial I/O: 5 channels X/Y Converter: 16 bits X 16 bits CAN Module: 3 channels
Clock Generation Circuit XIN - XOUT XCIN - XCOUT On-chip Oscillator PLL Frequency Synthesizer
Port P7
8
DMAC
Port P8
DMACII
CRC Calculation Circuit (CCITT): X16+X12+X5+1
7
P85
M32C/80 series CPU Core
Intelligent I/O Time Measurement: 8 channels Wave Generating: 8 channels Communication Functions: Clock Synchronous Serial I/O, UART, HDLC Data Processing R0H R1H R2 R3 A0 A1 FB SB R0L R1L FLG INTB ISP USP PC SVF SVP VCT
Memory
Port P9
ROM
8
RAM
Port P10
8
Multiplier
Port P14
Port P15
Port P11
Port P12
Port P13
7
8
5
8
8
(Note 1) NOTES: 1. Ports P11 to P15 are provided in the 144-pin package only. 2. Included in the 144-pin package only.
Figure 1.1 M32C/88 Group (M32C/88T) Block Diagram
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
1.4 Product Information
Table 1.3 lists the product information. Figure 1.2 shows the product numbering system. Table 1.3 M32C/88 Group (1) (T version, M32C/88T)
Type Number M30882FJTGP M30880FJTGP M30882FHTGP M30880FHTGP M30882FWTGP M30880FWTGP (D): Under development (D) (D) (D) (D) (D) (D) Package Type PLQP0144KA-A (144P6Q-A) 512K+4K PLQP0100KB-A (100P6Q-A) PLQP0144KA-A (144P6Q-A) 384K+4K PLQP0100KB-A (100P6Q-A) PLQP0144KA-A (144P6Q-A) 320K+4K PLQP0100KB-A (100P6Q-A) 18K Flash Memory T version (High-reliability 85 C) ROM Capacity
As of October, 2005
RAM Capacity Remarks
Table 1.3 M32C/88 Group (2) (U version, M32C/88T)
Type Number M30882FJUGP M30880FJUGP M30882FHUGP M30880FHUGP M30882FWUGP M30880FWUGP (D): Under development (D) (D) (D) (D) (D) (D) Package Type PLQP0144KA-A (144P6Q-A) 512K+4K PLQP0100KB-A (100P6Q-A) PLQP0144KA-A (144P6Q-A) 384K+4K PLQP0100KB-A (100P6Q-A) PLQP0144KA-A (144P6Q-A) 320K+4K PLQP0100KB-A (100P6Q-A) 18K ROM Capacity
As of October, 2005
RAM Capacity Remarks
Flash Memory U version (High-reliability 105 C)
NOTE: Contact our sales office if you are interested in the V version.
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
M30 88 0 F H T GP
Package Type: GP = Package PLQP0100KB-A (100P6Q-A) Package PLQP0144KA-A (144P6Q-A) Classification: T = T Version U = U Version ROM Capacity: W = 320 Kbytes H = 384 Kbytes J = 512 Kbytes Memory Type: F = Flash Memory Version RAM Capacity, Pin Count, etc M32C/88 Group M16C Family
Figure 1.2 Product Numbering System
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
1.5 Pin Assignment
Figures 1.3 and 1.4 show pin assignments (top view).
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
P10 AN07 / P07 AN06 / P06 AN05 / P05 AN04 / P04 P114 OUTC13 / INPC13 / P113 BE1IN / ISRxD1 / OUTC12 / INPC12 / P112 ISCLK1 / OUTC11 / INPC11 / P111 BE1OUT / ISTxD1 / OUTC10 / INPC10 / P110 AN03 / P03 AN02 / P02 AN01 / P01 AN00 / P00 AN157 / P157 AN156 / P156 AN155 / P155 AN154 / P154 AN153 / P153 ISRxD0 / AN152 / P152 ISCLK0 / AN151 / P151 Vss ISTxD0 / AN150 / P150 Vcc KI3 / AN7 / P107 KI2 / AN6 / P106 KI1 / AN5 / P105 KI0 / AN4 / P104 AN3 / P103 AN2 / P102 AN1 / P101 AVss AN0 / P100 VREF AVcc STxD4 / SCL4 / RxD4 / ADTRG / P97
109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
73
72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37
P11 P12 P13 P14 P15 / INT3 P16 / INT4 P17 / INT5 P20 / AN20 P21 / AN21 P22 / AN22 P23 / AN23 P24 / AN24 P25 / AN25 P26 / AN26 P27 / AN27 Vss P30 Vcc P120 P121 P122 P123 P124 P31 P32 P33 P34 P35 P36 P37 P40 P41 Vss P42 Vcc P43
M32C/88 GROUP (M32C/88T)
P44 P45 P46 P47 P125 P126 P127 P50 P51 P52 P53 / CLKOUT P130 P131 Vcc P132 Vss P133 P54 P55 P56 P57 P134 P135 P136 P137 P60 / CTS0 / RTS0 / SS0 / CAN2OUT P61 / CLK0 / CAN2IN / CAN2WU P62 / RxD0 / SCL0 / STxD0 P63 / TxD0 / SDA0 / SRxD0 P64 / CTS1 / RTS1 / SS1 P65 / CLK1 Vss P66 / RxD1 / SCL1 / STxD1 Vcc P67 / TxD1 / SDA1 / SRxD1 P70(1, 2)
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
NOTES: 1. P70 / TA0OUT / TxD2 / SDA2 / SRxD2 / INPC16 / OUTC16 2. P70 and P71 are ports for the N-channel open drain output.
CAN1OUT / SRxD4 / SDA4 / TxD4 / ANEX1 / P96 CAN1WU / CAN1IN / CLK4 / ANEX0 / P95 SS4 / RTS4 / CTS4 / TB4IN / DA1 / P94 SS3 / RTS3 / CTS3 / TB3IN / DA0 / P93 SRxD3 / SDA3 / TxD3 / TB2IN / P92 STxD3 / SCL3 / RxD3 / TB1IN / P91 CLK3 / TB0IN / P90 P146 P145 P144 OUTC17 / INPC17 / P143 OUTC16 / INPC16 / P142 OUTC15 / INPC15 / P141 OUTC14 / INPC14 / P140 BYTE CNVss XCIN / P87 XCOUT / P86 RESET XOUT Vss XIN Vcc NMI / P85 INT2 / P84 CAN0IN / CAN1IN / INT1 / P83 CAN0OUT / CAN1OUT / INT0 / P82 INPC15 / OUTC15 / U / TA4IN / P81 ISRxD0 / U / TA4OUT / P80 ISCLK0 / INPC14 / OUTC14 / CAN0IN / CAN02IN / TA3IN / P77 ISTxD0 / INPC13 / OUTC13 / CAN0OUT / CAN02OUT / TA3OUT / P76 BE1IN / ISRxD1 / OUTC12 / INPC12 / W / TA2IN / P75 ISCLK1 / OUTC11 / INPC11 / W / TA2OUT / P74 BE1OUT / ISTxD1 / OUTC10 / INPC10 / SS2 / RTS2 / CTS2 / V / TA1IN / P73 CLK2 / V / TA1OUT / P72 (2)INPC17 / OUTC17 / STxD2 / SCL2 / RxD2 / TA0IN / TB5IN / P71
36
11
1
2
3
4
5
6
7
8
9
PLQP0144KA-A (144P6Q-A)
Figure 1.3 Pin Assignment for 144-Pin Package
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
Table 1.4 Pin Characteristics for 144-Pin Package
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BYTE 16 CNVSS 17 XCIN 18 XCOUT 19 RESET 20 XOUT 21 VSS 22 XIN 23 VCC 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 VCC 39 VSS 40 41 42 43 44 45 46 47 48 P85 P84 P83 P82 P81 P80 P77 P76 P75 P74 P73 P72 P71 P70 P67 P66 P65 P64 P63 P62 P61 P60 P137 NMI INT2 INT1 INT0 TA4IN/U TA4OUT/U TA3IN TA3OUT TA2IN/W TA2OUT/W TA1IN/V CTS2/RTS2/SS2 TA1OUT/V CLK2 TB5IN/TA0IN RxD2/SCL2/STxD2 TxD2/SDA2/SRxD2 TA0OUT TxD1/SDA1/SRxD1 RxD1/SCL1/STxD1 CLK1 CTS1/RTS1/SS1 TxD0/SDA0/SRxD0 RxD0/SCL0/STxD0 CLK0/CAN2IN/CAN2WU CTS0/RTS0/SS0/CAN2OUT CAN0IN/CAN02IN CAN0OUT/CAN02OUT CAN0IN/CAN1IN CAN0OUT/CAN1OUT INPC15/OUTC15 ISRxD0 INPC14/OUTC14/ISCLK0 INPC13/OUTC13/ISTxD0 INPC12/OUTC12/ISRxD1/BE1IN INPC11/OUTC11/ISCLK1 INPC10/OUTC10/ISTxD1/BE1OUT INPC17/OUTC17 INPC16/OUTC16 Control Pin Port P96 P95 P94 P93 P92 P91 P90 P146 P145 P144 P143 P142 P141 P140 INPC17/OUTC17 INPC16/OUTC16 INPC15/OUTC15 INPC14/OUTC14 TB4IN TB3IN TB2IN TB1IN TB0IN Interrupt Pin Timer Pin UART/CAN Pin TxD4/SDA4/SRxD4/CAN1OUT CLK4/CAN1IN/CAN1WU CTS4/RTS4/SS4 CTS3/RTS3/SS3 TxD3/SDA3/SRxD3 RxD3/SCL3/STxD3 CLK3 Intelligent I/O Pin Analog Pin ANEX1 ANEX0 DA1 DA0
P87 P86
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
Table 1.4 Pin Characteristics for 144-Pin Package (Continued)
Pin No. 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 VCC VSS VCC P131 P130 P53 P52 P51 P50 P127 P126 P125 P47 P46 P45 P44 P43 P42 P41 P40 P37 P36 P35 P34 P33 P32 P31 P124 P123 P122 P121 VCC VSS P30 P27 P26 P25 AN27 AN26 AN25 P120 VSS P132 Control Pin Port P136 P135 P134 P57 P56 P55 P54 P133 Interrupt Pin Timer Pin UART/CAN Pin Intelligent I/O Pin Analog Pin
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
Table 1.4 Pin Characteristics for 144-Pin Package (Continued)
Pin No. 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 Control Pin Port P24 P23 P22 P21 P20 P17 P16 P15 P14 P13 P12 P11 P10 P07 P06 P05 P04 P114 P113 P112 P111 P110 P03 P02 P01 P00 P157 P156 P155 P154 P153 P152 P151 VSS P150 VCC P107 P106 P105 P104 P103 P102 P101 AVSS P100 VREF AVCC P97 RxD4/SCL4/STxD4 ADTRG AN0 KI3 KI2 KI1 KI0 AN7 AN6 AN5 AN4 AN3 AN2 AN1 ISTxD0 AN150 ISRxD0 ISCLK0 INPC13/OUTC13 INPC12/OUTC12/ISRxD1/BE1IN INPC11/OUTC11/ISCLK1 INPC10/OUTC10/ISTxD1/BE1OUT AN03 AN02 AN01 AN00 AN157 AN156 AN155 AN154 AN153 AN152 AN151 AN07 AN06 AN05 AN04 INT5 INT4 INT3 Interrupt Pin Timer Pin UART/CAN Pin Intelligent I/O Pin Analog Pin AN24 AN23 AN22 AN21 AN20
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M32C/88 Group (M32C/88T)
1. Overview
P20 / AN20
P21 / AN21
P22 / AN22
P23 / AN23
P24 / AN24
P25 / AN25
P26 / AN26
P27 / AN27
P15 / INT3
P16 / INT4
P17 / INT5
P13
P14
P30
P31
P32
P33
P34
P35
P36
P37 53
P40 52
75
74
73
72
71
70
69
68
67
65
64
63
62
Vss
61
60
59
58
57
56
54
51
66
55
P41
Vcc
P12 P11 P10 AN07 / P07 AN06 / P06 AN05 / P05 AN04 / P04 AN03 / P03 AN02 / P02 AN01 / P01 AN00 / P00 KI3 / AN7 / P107 KI2 / AN6 / P106 KI1 / AN5 / P105 KI0 / AN4 / P104 AN3 / P103 AN2 / P102 AN1 / P101 AVss AN0 / P100 VREF AVcc STxD4 / SCL4 / RxD4 / ADTRG / P97
(3)
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
10 12 13 14 15 16 17 19 20 21 23 24 25 18 22 11 1 2 3 4 5 6 7 8 9
50 49 48 47 46 45 44 43 42 41
P42 P43 P44 P45 P46 P47 P50 P51 P52 P53 / CLKOUT P54 P55 P56 P57 P60 / CTS0 / RTS0 / SS0 / CAN2OUT P61 / CLK0 / CAN2IN / CAN2WU P62 / RxD0 / SCL0 / STxD0 P63 / TxD0 / SDA0 / SRxD0 P64 / CTS1 / RTS1 / SS1 P65 / CLK1 P66 / RxD1 / SCL1 / STxD1 P67 / TxD1 / SDA1 / SRxD1 P70
(1, 4)
M32C/88 GROUP (M32C/88T)
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
P96
P71(2, 4) P72 / TA1OUT / V / CLK2
CAN1WU / CAN1IN / CLK4 / ANEX0 / P95
RESET
XOUT
Vss
XIN
SS4 / RTS4 / CTS4 / TB4IN / DA1 / P94
SS3 / RTS3 / CTS3 / TB3IN / DA0 / P93
SRxD3 / SDA3 / TxD3 / TB2IN / P92
STxD3 / SCL3 / RxD3 / TB1IN / P91
CLK3 / TB0IN / P90
BYTE
XCIN / P87
XCOUT / P86
Vcc
NMI / P85
INT2 / P84
CAN0IN / CAN1IN / INT1 / P83
CAN0OUT / CAN1OUT / INT0 / P82
OUTC15 / INPC15 / U / TA4IN / P81
ISRxD0 / U / TA4OUT / P80
ISCLK0 / OUTC14 / INPC14 / CAN0IN / CAN02IN / TA3IN / P77
ISTxD0 / OUTC13 / INPC13 / CAN0OUT / CAN02OUT / TA3OUT / P76
BE1IN / ISRxD1 / OUTC12 / INPC12 / W / TA2IN / P75
ISCLK1 / OUTC11 / INPC11 / W / TA2OUT / P74
CNVss
NOTES: 1. P70 / TA0OUT / TxD2 / SDA2 / SRxD2 / OUTC16 / INPC16 2. P71 / TA0IN / TB5IN / RxD2 / SCL2 / STxD2 / OUTC17 / INPC17 3. P96 / ANEX1 / TxD4 / SDA4 / SRxD4 / CAN1OUT 4. P70 and P71 are ports for the N-channel open drain output.
BE1OUT / ISTxD1 / OUTC10 / SS2 / INPC10 / RTS2 / CTS2 / V / TA1IN / P73
PLQP0100KB-A (100P6Q-A)
Figure 1.4 Pin Assignment for 100-Pin Package
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
Table 1.5 Pin Characteristics for 100-Pin Package
Pin No.
Control Pin
Port P94 P93 P92 P91 P90
Interrupt Pin
Timer Pin TB4IN TB3IN TB2IN TB1IN TB0IN
UART/CAN Pin CTS4/RTS4/SS4 CTS3/RTS3/SS3 TxD3/SDA3/SRxD3 RxD3/SCL3/STxD3 CLK3
Intelligent I/O Pin
Analog Pin DA1 DA0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 BYTE CNVSS
XCIN
P87 P86
XCOUT RESET XOUT VSS XIN VCC
P85 P84 P83 P82 P81 P80 P77 P76 P75 P74 P73 P72 P71 P70 P67 P66 P65 P64 P63 P62 P61 P60 P57 P56 P55 P54 P53 P52 P51 P50 P47 P46 P45 P44 P43 P42
NMI INT2 INT1 INT0 TA4IN/U TA4OUT/U TA3IN TA3OUT TA2IN/W TA2OUT/W TA1IN/V CAN0IN/CAN1IN CAN0OUT/CAN1OUT INPC15/OUTC15 CAN0IN/CAN02IN ISRxD0 INPC14/OUTC14/ISCLK0 CAN0OUT/CAN02OUT INPC13/OUTC13/ISTxD0 INPC12/OUTC12/ISRxD1/BE1IN INPC11/OUTC11/ISCLK1 CTS2/RTS2/SS2 INPC10/OUTC10/ISTxD1/BE1OUT TA1OUT/V CLK2 TB5IN/TA0IN RxD2/SCL2/STxD2 INPC17/OUTC17 TA0OUT TxD2/SDA2/SRxD2 INPC16/OUTC16 TxD1/SDA1/SRxD1 RxD1/SCL1/STxD1 CLK1 CTS1/RTS1/SS1 TxD0/SDA0/SRxD0 RxD0/SCL0/STxD0 CLK0/CAN2IN/CAN2WU CTS0/RTS0/SS0/CAN2OUT
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
Table 1.5 Pin Characteristics for 100-Pin Package (Continued)
Pin No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 AVSS P100 VREF AVCC P97 P96 P95 RxD4/SCL4/STxD4 TxD4/SDA4/SRxD4/CAN1OUT CLK4/CAN1IN/CAN1WU ADTRG ANEX1 ANEX0 AN0 VCC P30 VSS P27 P26 P25 P24 P23 P22 P21 P20 P17 P16 P15 P14 P13 P12 P11 P10 P07 P06 P05 P04 P03 P02 P01 P00 P107 P106 P105 P104 P103 P102 P101 KI3 KI2 KI1 KI0 AN07 AN06 AN05 AN04 AN03 AN02 AN01 AN00 AN7 AN6 AN5 AN4 AN3 AN2 AN1 INT5 INT4 INT3 AN27 AN26 AN25 AN24 AN23 AN22 AN21 AN20 Control Pin Port P41 P40 P37 P36 P35 P34 P33 P32 P31 Interrupt Pin Timer Pin UART/CAN Pin Intelligent I/O Pin Analog Pin
Rev. 1.10 Oct. 31, 2005 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
1. Overview
1.6 Pin Description
Table 1.6 Pin Description (100-Pin and 144-Pin Packages)
Classsfication Power Supply Analog Power Supply Reset Input Symbol VCC VSS AVCC AVSS ____________ RESET I/O Type I I I I I Function Apply 4.2 to 5.5 V to both VCC pins. Apply 0 V to the VSS pin Supplies power to the A/D converter. Connect the AVCC pin to VCC and the AVSS pin to VSS ___________ The microcomputer is in a reset state when "L" is applied to the RESET pin Switches processor mode. Connect the CNVSS pin to VSS Connect the BYTE pin to VSS
CNVSS CNVSS Input to Switch BYTE External Data Bus Width Main Clock Input XIN Main Clock Output XOUT Sub Clock Input XCIN Sub Clock output XCOUT Clock Output
______
I O I O O I I I I/O I I O I O I/O I O I/O
I/O pins for the main clock oscillation circuit. Connect a ceramic resonator or crystal oscillator between XIN and XOUT. To apply external clock, apply it to XIN and leave XOUT open. I/O pins for the sub clock oscillation circuit. Connect a crystal oscillator between XCIN and XCOUT. To apply external clock, apply it to XCIN and leave XCOUT open Outputs the clock having the same frequency as fC, f8 or f32
______
CLKOUT
________
INT Interrupt Input
_______
INT0 to ________ INT5
_______
Input pins for the INT interrupt
_______
NMI Interrupt Input NMI _____ _____ Key Input Interrupt KI0 to KI3 Timer A TA0OUT to TA4OUT TA0IN to TA4IN Timer B TB0IN to TB5IN
___ ___
Input pin for the NMI interrupt Input pins for the key input interrupt I/O pins for the timer A0 to A4 (TA0OUT is a pin for the N-channel open drain output.) Input pins for Timer A0 to A4 Input pins for Timer B0 to B5 Output pins for the three-phase motor control timer Input pins for data transmission control Output pins for data reception control Inputs and outputs the transfer clock Inputs serial data Outputs serial data (TxD2 is a pin for the N-channel open drain output.) Inputs and outputs serial data (SDA2 is a pin for the N-channel open drain output.) Inputs and outputs the transfer clock (SCL2 is a pin for the N-channel open drain output.)
Three-phase Motor U, U, V, V, ___ Control Timer Output W, W
_________ ________
Serial I/O
CTS0 to CTS4 _________ _________ RTS0 to RTS4 CLK0 to CLK4 RxD0 to RxD4 TxD0 to TxD4
I2C Mode
SDA0 to SDA4 SCL0 to SCL4
Serial I/O STxD0 to Special Function STxD4 SRxD0 to SRxD4
_______ _______
O I I
Outputs serial data when slave mode is selected (STxD2 is a pin for the N-channel open drain output.) Inputs serial data when slave mode is selected Input pins to control serial I/O special function
SS0 to SS4 I : Input O : Output
I/O : Input and output
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M32C/88 Group (M32C/88T)
1. Overview
Table 1.6 Pin Description (100-Pin and 144-Pin Packages) (Continued)
Classsfication Reference Voltage Input A/D Converter Symbol VREF AN0 to AN7 AN00 to AN07 AN20 to AN27
___________
I/O Type I I
Function Applies reference voltage to the A/D converter and D/A converter Analog input pins for the A/D converter
ADTRG ANEX0 ANEX1 D/A Converter Intelligent I/O DA0, DA1 INPC10 to INPC17 OUTC10 to OUTC17 ISCLK0 ISCLK1 ISRXD0 ISRXD1 ISTXD0 ISTXD1 BE1IN CAN BE1OUT CAN0IN CAN02IN CAN1IN CAN2IN CAN0OUT CAN02OUT CAN1OUT CAN2OUT _______________ CAN1WU
________________
I I/O I O I O I/O I O I O I
Input pin for an external A/D trigger Extended analog input pin for the A/D converter and output pin in external op-amp connection mode Extended analog input pin for the A/D converter Output pin for the D/A converter Input pins for the time measurement function Output pins for the waveform generating function (OUTC16 and OUTC17 assigned to P70 and P71 are pins for the N-channel open drain output.) Inputs and outputs the clock for the intelligent I/O communication function Inputs data for the intelligent I/O communication function Outputs data for the intelligent I/O communication function Inputs data for the intelligent I/O communication function Outputs data for the intelligent I/O communication function Input pin for the CAN communication function
O
Output pin for the CAN communication function
I I/O
Input pin for the CANi wake-up interrupt (i=1, 2) 8-bit I/O ports for CMOS. Each port can be programmed for input or output under the control of the direction register. An input port can be set, by program, for a pull-up resistor available or for no pull-up resister available in 4-bit units
I/O Ports
CAN2WU P00 to P07 P10 to P17 P20 to P27 P30 to P37 P40 to P47 P50 to P57 P60 to P67 P70 to P77 P90 to P97 P100 to P107 P80 to P84
I/O
I/O ports having equivalent functions to P0 (P70 and P71 are ports for the N-channel open drain output.)
I/O I
I/O ports having equivalent functions to P0
_______ _______
Input Port I : Input
P86, P87 P85 O : Output
Shares a pin with NMI. NMI input state can be got by reading P85
I/O : Input and output
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M32C/88 Group (M32C/88T)
1. Overview
Table 1.6 Pin Description (144-Pin Package Only) (Continued)
Classsfication A/D Converter I/O Ports Symbol AN150 to AN157 P110 to P114 P120 to P127 P130 to P137 P140 to P146 P150 to P157 I : Input O : Output I/O : Input and output I/O Type I I/O Function Analog input pins for the A/D converter I/O ports having equivalent functions to P0
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M32C/88 Group (M32C/88T)
2. Central Processing Unit (CPU)
2. Central Processing Unit (CPU)
Figure 2.1 shows the CPU registers. The register bank is comprised of 8 registers (R0, R1, R2, R3, A0, A1, SB and FB) out of 28 CPU registers. Two sets of register banks are provided.
b31
b15
b0
General Registers
R2 R3
R0H R1H R2
R0L R1L Data Register(1)
b23
R3 A0 A1 SB FB USP ISP INTB PC FLG Address Register(1) Static Base Register(1) Frame Base Register(1) User Stack Pointer Interrupt Stack Pointer Interrupt Table Register Program Counter Flag Register
b0
b15
b8 b7
IPL
U I OBSZDC
Carry Flag Debug Flag Zero Flag Sign Flag Register Bank Select Flag Overflow Flag Interrupt Enable Flag Stack Pointer Select Flag Reserved Space Processor Interrupt Priority Level Reserved Space
b15 b0
High-speed Interrupt Registers
b23
SVF SVP VCT
b7 b0
Flag Save Register PC Save Register Vector Register
DMAC-associated Registers
b15
DMD0 DMD1 DCT0 DCT1 DRC0
b23
DMA Mode Register
DMA Transfer Count Register
DRC1 DMA0 DMA1 DRA0 DRA1 DSA0 DSA1
DMA Transfer Count Reload Register
DMA Memory Address Register
DMA Memory Address Reload Register
DMA SFR Address Register
NOTE: 1. The register bank is comprised of these registers. Two sets of register banks are provided.
Figure 2.1 CPU Register
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M32C/88 Group (M32C/88T)
2. Central Processing Unit (CPU)
2.1 General Registers 2.1.1 Data Registers (R0, R1, R2 and R3)
R0, R1, R2 and R3 are 16-bit registers for transfer, arithmetic and logic operations. R0 and R1 can be split into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R0 can be combined with R2 to be used as a 32-bit data register (R2R0). The same applies to R1 and R3.
2.1.2 Address Registers (A0 and A1)
A0 and A1 are 24-bit registers for A0-/A1-indirect addressing, A0-/A1-relative addressing, transfer, arithmetic and logic operations.
2.1.3 Static Base Register (SB)
SB is a 24-bit register for SB-relative addressing.
2.1.4 Frame Base Register (FB)
FB is a 24-bit register for FB-relative addressing.
2.1.5 Program Counter (PC)
PC, 24 bits wide, indicates the address of an instruction to be executed.
2.1.6 Interrupt Table Register (INTB)
INTB is a 24-bit register indicating the starting address of an relocatable interrupt vector table.
2.1.7 User Stack Pointer (USP), Interrupt Stack Pointer (ISP)
The stack pointers (SP), USP and ISP, are 24 bits wide each. The U flag is used to switch between USP and ISP. Refer to 2.1.8 Flag Register (FLG) for details on the U flag. Set USP and ISP to even addresses to execute an interrupt sequence efficiently.
2.1.8 Flag Register (FLG)
FLG is a 16-bit register indicating a CPU state. 2.1.8.1 Carry Flag (C) The C flag indicates whether carry or borrow has occurred after executing an instruction. 2.1.8.2 Debug Flag (D) The D flag is for debug only. Set to "0". 2.1.8.3 Zero Flag (Z) The Z flag is set to "1" when the value of zero is obtained from an arithmetic operation; otherwise "0". 2.1.8.4 Sign Flag (S) The S flag is set to "1" when a negative value is obtained from an arithmetic operation; otherwise "0".
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M32C/88 Group (M32C/88T)
2. Central Processing Unit (CPU)
2.1.8.5 Register Bank Select Flag (B) The register bank 0 is selected when the B flag is set to "0". The register bank 1 is selected when this flag is set to "1". 2.1.8.6 Overflow Flag (O) The O flag is set to "1" when the result of an arithmetic operation overflows; otherwise "0". 2.1.8.7 Interrupt Enable Flag (I) The I flag enables a maskable interrupt. Interrupt is disabled when the I flag is set to "0" and enabled when the I flag is set to "1". The I flag is set to "0" when an interrupt is acknowledged. 2.1.8.8 Stack Pointer Select Flag (U) ISP is selected when the U flag is set to "0". USP is selected when this flag is set to "1". The U flag is set to "0" when a hardware interrupt is acknowledged or the INT instruction of software interrupt numbers 0 to 31 is executed. 2.1.8.9 Processor Interrupt Priority Level (IPL) IPL, 3 bits wide, assigns processor interrupt priority levels from level 0 to level 7. If a requested interrupt has greater priority than IPL, the interrupt is enabled. 2.1.8.10 Reserved Space When writing to a reserved space, set to "0". When reading, its content is indeterminate.
2.2 High-Speed Interrupt Registers
Registers associated with the high-speed interrupt are as follows: - Flag save register (SVF) - PC save register (SVP) - Vector register (VCT)
2.3 DMAC-Associated Registers
Registers associated with DMAC are as follows: - DMA mode register (DMD0, DMD1) - DMA transfer count register (DCT0, DCT1) - DMA transfer count reload register (DRC0, DRC1) - DMA memory address register (DMA0, DMA1) - DMA SFR address register (DSA0, DSA1) - DMA memory address reload register (DRA0, DRA1)
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M32C/88 Group (M32C/88T)
3. Memory
3. Memory
Figure 3.1 shows a memory map of the M32C/88 Group (M32C/88T). The M32C/88 Group (M32C/88T) provides 16-Mbyte address space addressed from 00000016 to FFFFFF16. The internal ROM is allocated from address FFFFFF16 to lower. For example, a 64-Kbyte internal ROM is addressed from FF000016 to FFFFFF16. The fixed interrupt vectors are allocated from address FFFFDC16 to FFFFFF16. It stores the starting address of each interrupt routine. The internal RAM is allocated from address 00040016 to higher. For example, a 10-Kbyte internal RAM is allocated from address 00040016 to 002BFF16. Besides storing data, it becomes stacks when the subroutine is called or an interrupt is acknowledged. SFRs, consisting of control registers for peripheral functions such as I/O port, A/D converter, serial I/O, timers, is allocated from address 00000016 to 0003FF16. All blank spaces within SFRs are reserved and cannot be accessed by users. The special page vectors are addressed from FFFE0016 to FFFFDB16. It is used for the JMPS instruction and JSRS instruction. Refer to the Renesas publication M32C/80 Series Software Manual for details.
00000016 SFRs 00040016 XXXXXX16 00F00016 Internal RAM Reserved Space Internal ROM (Data space) Internal RAM XXXXXX16 Capacity 18 Kbytes 004BFF16 Internal ROM YYYYYY16 Capacity FB000016 320 Kbytes FA000016 384 Kbytes F8000016 512 Kbytes 00FFFF16
(1)
FFFE0016 Special Page Vector Table FFFFDC16 Undefined Instruction Overflow BRK Instruction Address Match Watchdog Timer(2)
Reserved Space
YYYYYY16 Internal ROM FFFFFF16 FFFFFF16
NMI Reset
NOTES: 1. Additional 4-Kbyte space is provided in the flash memory version for storing data. 2. Watchdog timer interrupt and oscillation stop detection interrupt share vectors.
Figure 3.1 Memory Map
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M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
4. Special Function Registers (SFRs)
Address 000016 000116 000216 000316 000416 000516 000616 000716 000816 000916 000A16 000B16 000C16 000D16 000E16 000F16 001016 001116 001216 001316 001416 001516 001616 001716 001816 001916 001A16 001B16 001C16 001D16 001E16 001F16 002016 002116 002216 002316 002416 002516 002616 002716 002816 002916 002A16 002B16 002C16 002D16 002E16 002F16 Register Symbol Value after RESET
Processor Mode Register(1) Processor Mode Register 1 System Clock Control Register 0 System Clock Control Register 1 Address Match Interrupt Enable Register Protect Register Main Clock Division Register Oscillation Stop Detection Register Watchdog Timer Start Register Watchdog Timer Control Register Address Match Interrupt Register 0 Processor Mode Register 2 Address Match Interrupt Register 1
PM0 PM1 CM0 CM1 AIER PRCR MCD CM2 WDTS WDC RMAD0 PM2 RMAD1
1000 00002(CNVss pin ="L") 0016 0000 10002 0010 00002 0016 XXXX 00002 XXX0 10002 0016 XX16 000X XXXX2 00000016 0016 00000016
Address Match Interrupt Register 2
RMAD2
00000016
Address Match Interrupt Register 3
RMAD3
00000016
PLL Control Register 0 PLL Control Register 1 Address Match Interrupt Register 4
PLC0 PLC1 RMAD4
0001 X0102 000X 00002 00000016
Address Match Interrupt Register 5
RMAD5
00000016
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTE: 1. The PM01 and PM00 bits in the PM0 register maintain values set before reset, even after software reset or watchdog timer reset has been performed.
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M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 006016 003016 003116 003216 003316 003416 003516 003616 003716 003816 003916 003A16 003B16 003C16 003D16 003E16 003F16 004016 004116 004216 004316 004416 004516 004616 004716 004816 004916 004A16 004B16 004C16 004D16 004E16 004F16 005016 005116 005216 005316 005416 005516 005616 005716 005816 005916 005A16 005B16 005C16 005D16 005E16 005F16
Register
Symbol
Value after RESET
Address Match Interrupt Register 6
RMAD6
00000016
Address Match Interrupt Register 7
RMAD7
00000016
Flash Memory Control Register 1 Flash Memory Control Register 0
FMR1 FMR0
0000 01012 0000 00012
X: Indeterminate Blank spaces are reserved. No access is allowed.
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M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 006016 006116 006216 006316 006416 006516 006616 006716 006816 006916 006A16 006B16 006C16 006D16 006E16 006F16 007016 007116 007216 007316 007416 007516 007616 007716 007816 007916 007A16 007B16 007C16 007D16 007E16 007F16 008016 008116 008216 008316 008416 008516 008616 008716 008816 008916 008A16 008B16 008C16 008D16 008E16 008F16
Register
Symbol
Value after RESET
DMA0 Interrupt Control Register Timer B5 Interrupt Control Register DMA2 Interrupt Control Register UART2 Receive /ACK Interrupt Control Register Timer A0 Interrupt Control Register UART3 Receive /ACK Interrupt Control Register Timer A2 Interrupt Control Register UART4 Receive /ACK Interrupt Control Register Timer A4 Interrupt Control Register UART0/UART3 Bus Conflict Detect Interrupt Control Register UART0 Receive/ACK Interrupt Control Register A/D0 Conversion Interrupt Control Register UART1 Receive/ACK Interrupt Control Register Intelligent I/O Interrupt Control Register 0/ CAN Interrupt 3 Control Register Timer B1 Interrupt Control Register Intelligent I/O Interrupt Control Register 2/ CAN Interrupt 6 Control Register Timer B3 Interrupt Control Register Intelligent I/O Interrupt Control Register 4 INT5 Interrupt Control Register CAN Interrupt 8 Control Register INT3 Interrupt Control Register Intelligent I/O Interrupt Control Register 8 INT1 Interrupt Control Register Intelligent I/O Interrupt Control Register 10/ CAN Interrupt 1 Control Register CAN Interrupt 2 Control Register
DM0IC TB5IC DM2IC S2RIC TA0IC S3RIC TA2IC S4RIC TA4IC BCN0IC/BCN3IC S0RIC AD0IC S1RIC IIO0IC/ CAN3IC TB1IC IIO2IC/ CAN6IC TB3IC IIO4IC INT5IC CAN8IC INT3IC IIO8IC INT1IC IIO10IC/ CAN1IC CAN2IC
XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XX00 X0002 XXXX X0002 XX00 X0002 XXXX X0002 XX00 X0002 XXXX X0002
XXXX X0002
DMA1 Interrupt Control Register UART2 Transmit /NACK Interrupt Control Register DMA3 Interrupt Control Register UART3 Transmit /NACK Interrupt Control Register Timer A1 Interrupt Control Register UART4 Transmit /NACK Interrupt Control Register Timer A3 Interrupt Control Register UART2 Bus Conflict Detect Interrupt Control Register
DM1IC S2TIC DM3IC S3TIC TA1IC S4TIC TA3IC BCN2IC
XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002
X: Indeterminate Blank spaces are reserved. No access is allowed.
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M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 009016 009116 009216 009316 009416 009516 009616 009716 009816 009916 009A16 009B16 009C16 009D16 009E16 009F16 00A016 00A116 00A216 00A316 00A416 00A516 00A616 00A716 00A816 00A916 00AA16 00AB16 00AC16 00AD16 00AE16 00AF16 00B016 00B116 00B216 00B316 00B416 00B516 00B616 00B716 00B816 00B916 00BA16 00BB16 00BC16 00BD16 00BE16 00BF16
Register UART0 Transmit /NACK Interrupt Control Register UART1/UART4 Bus Conflict Detect Interrupt Control Register UART1 Transmit/NACK Interrupt Control Register Key Input Interrupt Control Register Timer B0 Interrupt Control Register Intelligent I/O Interrupt Control Register 1/ CAN Interrupt 4 Control Register Timer B2 Interrupt Control Register Intelligent I/O Interrupt Control Register 3/ CAN Interrupt 7 Control Register Timer B4 Interrupt Control Register CAN Interrupt 5 Control Register INT4 Interrupt Control Register INT2 Interrupt Control Register Intelligent I/O Interrupt Control Register 9/ CAN Interrupt 0 Control Register INT0 Interrupt Control Register Exit Priority Control Register Interrupt Request Register 0 Interrupt Request Register 1 Interrupt Request Register 2 Interrupt Request Register 3 Interrupt Request Register 4 Interrupt Request Register 5 Interrupt Request Register 6 Interrupt Request Register 8 Interrupt Request Register 9 Interrupt Request Register 10 Interrupt Request Register 11
Symbol S0TIC BCN1IC/BCN4IC S1TIC KUPIC TB0IC IIO1IC/ CAN4IC TB2IC IIO3IC/ CAN7IC TB4IC CAN5IC INT4IC INT2IC IIO9IC/ CAN0IC INT0IC RLVL IIO0IR IIO1IR IIO2IR IIO3IR IIO4IR IIO5IR IIO6IR IIO8IR IIO9IR IIO10IR IIO11IR
Value after RESET XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XXXX X0002 XX00 X0002 XX00 X0002 XXXX X0002 XX00 X0002 XXXX 00002 0000 000X2 0000 000X2 0000 000X2 0000 000X2 0000 000X2 0000 000X2 0000 000X2 0000 000X2 0000 000X2 0000 000X2 0000 000X2
Interrupt Enable Register 0 Interrupt Enable Register 1 Interrupt Enable Register 2 Interrupt Enable Register 3 Interrupt Enable Register 4 Interrupt Enable Register 5 Interrupt Enable Register 6 Interrupt Enable Register 8 Interrupt Enable Register 9 Interrupt Enable Register 10 Interrupt Enable Register 11
IIO0IE IIO1IE IIO2IE IIO3IE IIO4IE IIO5IE IIO6IE IIO8IE IIO9IE IIO10IE IIO11IE
0016 0016 0016 0016 0016 0016 0016 0016 0016 0016 0016
X: Indeterminate Blank spaces are reserved. No access is allowed.
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M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 00C016 00C116 00C216 00C316 00C416 00C516 00C616 00C716 00C816 00C916 00CA16 00CB16 00CC16 00CD16 00CE16 00CF16 00D016 00D116 00D216 00D316 00D416 00D516 00D616 00D716 00D816 00D916 00DA16 00DB16 00DC16 00DD16 00DE16 00DF16 00E016 00E116 00E216 00E316 00E416 00E516 00E616 00E716 00E816 00E916 00EA16 00EB16 00EC16 00ED16 00EE16 00EF16
Register
Symbol
Value after RESET
SI/O Receive Buffer Register 0 Transmit Buffer/Receive Data Register 0 Receive Input Register 0 SI/O Communication Mode Register 0 Transmit Output Register 0 SI/O Communication Control Register 0
G0RB G0TB/G0DR G0RI G0MR G0TO G0CR
XXXX XXXX2 XXX0 XXXX2 XX16 XX16 0016 XX16 0000 X0112
X: Indeterminate Blank spaces are reserved. No access is allowed.
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M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 00F016 00F116 00F216 00F316 00F416 00F516 00F616 00F716 00F816 00F916 00FA16 00FB16 00FC16 00FD16 00FE16 00FF16 010016 010116 010216 010316 010416 010516 010616 010716 010816 010916 010A16 010B16 010C16 010D16 010E16 010F16 011016 011116 011216 011316 011416 011516 011616 011716 011816 011916 011A16 011B16 011C16 011D16 011E16 011F16
Register Data Compare Register 00 Data Compare Register 01 Data Compare Register 02 Data Compare Register 03 Data Mask Register 00 Data Mask Register 01 Communication Clock Select Register
Symbol G0CMP0 G0CMP1 G0CMP2 G0CMP3 G0MSK0 G0MSK1 CCS
Value after RESET XX16 XX16 XX16 XX16 XX16 XX16 XXXX 00002 XX16
Receive CRC Code Register 0 Transmit CRC Code Register 0 SI/O Extended Mode Register 0 SI/O Extended Receive Control Register 0 SI/O Special Communication Interrupt Detect Register 0 SI/O Extended Transmit Control Register 0 Time Measurement/Waveform Generating Register 10 Time Measurement/Waveform Generating Register 11 Time Measurement/Waveform Generating Register 12 Time Measurement/Waveform Generating Register 13 Time Measurement/Waveform Generating Register 14 Time Measurement/Waveform Generating Register 15 Time Measurement/Waveform Generating Register 16 Time Measurement/Waveform Generating Register 17 Waveform Generating Control Register 10 Waveform Generating Control Register 11 Waveform Generating Control Register 12 Waveform Generating Control Register 13 Waveform Generating Control Register 14 Waveform Generating Control Register 15 Waveform Generating Control Register 16 Waveform Generating Control Register 17 Time Measurement Control Register 10 Time Measurement Control Register 11 Time Measurement Control Register 12 Time Measurement Control Register 13 Time Measurement Control Register 14 Time Measurement Control Register 15 Time Measurement Control Register 16 Time Measurement Control Register 17
G0RCRC G0TCRC G0EMR G0ERC G0IRF G0ETC G1TM0/G1PO0 G1TM1/G1PO1 G1TM2/G1PO2 G1TM3/G1PO3 G1TM4/G1PO4 G1TM5/G1PO5 G1TM6/G1PO6 G1TM7/G1PO7 G1POCR0 G1POCR1 G1POCR2 G1POCR3 G1POCR4 G1POCR5 G1POCR6 G1POCR7 G1TMCR0 G1TMCR1 G1TMCR2 G1TMCR3 G1TMCR4 G1TMCR5 G1TMCR6 G1TMCR7
XX16 0016 0016 0016 0016 0016 0000 0XXX2 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 0000 X0002 0X00 X0002 0X00 X0002 0X00 X0002 0X00 X0002 0X00 X0002 0X00 X0002 0X00 X0002 0016 0016 0016 0016 0016 0016 0016 0016
X: Indeterminate Blank spaces are reserved. No access is allowed.
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M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 012016 012116 012216 012316 012416 012516 012616 012716 012816 012916 012A16 012B16 012C16 012D16 012E16 012F16 013016 013116 013216 013316 013416 013516 013616 013716 013816 013916 013A16 013B16 013C16 013D16 013E16 013F16 014016 014116 014216 014316 014416 014516 014616 014716 014816 014916 014A16 014B16 014C16 014D16 to 016F16 Base Timer Register 1
Register
Symbol G1BT G1BCR0 G1BCR1 G1TPR6 G1TPR7 G1FE G1FS G1RB G1TB/G1DR G1RI G1MR G1TO G1CR G1CMP0 G1CMP1 G1CMP2 G1CMP3 G1MSK0 G1MSK1
Value after RESET XX16 XX16 0016 X000 000X2 0016 0016 0016 0016 XXXX XXXX2 X000 XXXX2 XX16 XX16 0016 XX16 0000 X0112 XX16 XX16 XX16 XX16 XX16 XX16
Base Timer Control Register 10 Base Timer Control Register 11 Time Measurement Prescaler Register 16 Time Measurement Prescaler Register 17 Function Enable Register 1 Function Select Register 1 SI/O Receive Buffer Register 1 Transmit Buffer/Receive Data Register 1 Receive Input Register 1 SI/O Communication Mode Register 1 Transmit Output Register 1 SI/O Communication Control Register 1 Data Compare Register 10 Data Compare Register 11 Data Compare Register 12 Data Compare Register 13 Data Mask Register 10 Data Mask Register 11
XX16 Receive CRC Code Register 1 Transmit CRC Code Register 1 SI/O Extended Mode Register 1 SI/O Extended Receive Control Register 1 SI/O Special Communication Interrupt Detection Register 1 SI/O Extended Transmit Control Register 1 G1RCRC G1TCRC G1EMR G1ERC G1IRF G1ETC XX16 0016 0016 0016 0016 0016 0000 0XXX2
X: Indeterminate Blank spaces are reserved. No access is allowed.
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M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 017016 017116 017216 017316 017416 017516 017616 017716 017816 017916 017A16 017B16 017C16 017D16 017E16 017F16 018016 018116 018216 018316 018416 018516 018616 018716 018816 018916 018A16 018B16 018C16 018D16 018E16 018F16 019016 019116 019216 019316 019416 019516 019616 019716 019816 019916 019A16 019B16 019C16 019D16 019E16 019F16
Register CAN2 Slot Buffer Select Register CAN2 Control Register 1 CAN2 Sleep Control Register
Symbol C2SBS C2CTLR1 C2SLPR
Value after RESET 0016(1) X000 00XX2(1) XXXX XXX02 0016(1) 0116(1)
CAN2 Acceptance Filter Support Register
C2AFS
Input Function Select Register Input Function Select Register A
IPS IPSA
0016 0016
CAN2 Message Slot Buffer 0 Standard ID0 CAN2 Message Slot Buffer 0 Standard ID1 CAN2 Message Slot Buffer 0 Extended ID0 CAN2 Message Slot Buffer 0 Extended ID1 CAN2 Message Slot Buffer 0 Extended ID2 CAN2 Message Slot Buffer 0 Data Length Code CAN2 Message Slot Buffer 0 Data 0 CAN2 Message Slot Buffer 0 Data 1 CAN2 Message Slot Buffer 0 Data 2 CAN2 Message Slot Buffer 0 Data 3 CAN2 Message Slot Buffer 0 Data 4 CAN2 Message Slot Buffer 0 Data 5 CAN2 Message Slot Buffer 0 Data 6 CAN2 Message Slot Buffer 0 Data 7 CAN2 Message Slot Buffer 0 Time Stamp High-Order CAN2 Message Slot Buffer 0 Time Stamp Low-Order CAN2 Message Slot Buffer 1 Standard ID0 CAN2 Message Slot Buffer 1 Standard ID1 CAN2 Message Slot Buffer 1 Extended ID0 CAN2 Message Slot Buffer 1 Extended ID1 CAN2 Message Slot Buffer 1 Extended ID2 CAN2 Message Slot Buffer 1 Data Length Code CAN2 Message Slot Buffer 1 Data 0 CAN2 Message Slot Buffer 1 Data 1 CAN2 Message Slot Buffer 1 Data 2 CAN2 Message Slot Buffer 1 Data 3 CAN2 Message Slot Buffer 1 Data 4 CAN2 Message Slot Buffer 1 Data 5 CAN2 Message Slot Buffer 1 Data 6 CAN2 Message Slot Buffer 1 Data 7 CAN2 Message Slot Buffer 1 Time Stamp High-Order CAN2 Message Slot Buffer 1 Time Stamp Low-Order
C2SLOT0_0 C2SLOT0_1 C2SLOT0_2 C2SLOT0_3 C2SLOT0_4 C2SLOT0_5 C2SLOT0_6 C2SLOT0_7 C2SLOT0_8 C2SLOT0_9 C2SLOT0_10 C2SLOT0_11 C2SLOT0_12 C2SLOT0_13 C2SLOT0_14 C2SLOT0_15 C2SLOT1_0 C2SLOT1_1 C2SLOT1_2 C2SLOT1_3 C2SLOT1_4 C2SLOT1_5 C2SLOT1_6 C2SLOT1_7 C2SLOT1_8 C2SLOT1_9 C2SLOT1_10 C2SLOT1_11 C2SLOT1_12 C2SLOT1_13 C2SLOT1_14 C2SLOT1_15
XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTE: 1. Values are obtained by setting the SLEEP bit in the C2SLPR register to "1" (sleep mode exited) after reset and supplying a clock to the CAN module.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 28 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 01A016 01A116 01A216 01A316 01A416 01A516 01A616 01A716 01A816 CAN2 Control Register 0 CAN2 Status Register
Register
Symbol C2CTLR0 C2STR C2IDR C2CONR C2TSR C2TEC C2REC C2SISTR
Value after RESET XX01 0X012(2) XXXX 00002(2) 0000 00002(2) X000 0X012(2) 0016(2) 0016(2) 0000 XXXX2(2) 0000 00002(2) 0016(2) 0016(2) 0016(2) 0016(2) 0016(2) 0016(2)
CAN2 Extended ID Register CAN2 Configuration Register
CAN2 Time Stamp Register 01A916 01AA16 CAN2 Transmit Error Count Register 01AB16 CAN2 Receive Error Count Register 01AC16 CAN2 Slot Interrupt Status Register 01AD16 01AE16 01AF16 01B016 CAN2 Slot Interrupt Mask Register 01B116 01B216 01B316 01B416 01B516 01B616 01B716 01B816 01B916 01BA16 01BB16 01BC16 01BD16 01BE16 01BF16 01C016 01C116 01C216 01C316 01C416 01C516 01C616 01C716 01C816 01C916 01CA16 01CB16 01CC16 01CD16 01CE16 01CF16
0016(2) C2SIMKR 0016(2)
CAN2 Error Interrupt Mask Register CAN2 Error Interrupt Status Register CAN2 Error Cause Register CAN2 Baud Rate Prescaler CAN2 Mode Register
C2EIMKR C2EISTR C2EFR C2BRP C2MDR
XXXX X0002(2) XXXX X0002(2) 0016(2) 0000 00012(2) XXXX XX002(2)
CAN2 Single Shot Control Register
C2SSCTLR
0016(2) 0016(2)
CAN2 Single Shot Status Register
C2SSSTR
0016(2) 0016(2)
(Note 1)
CAN2 Global Mask Register Standard ID0 CAN2 Global Mask Register Standard ID1 CAN2 Global Mask Register Extended ID0 CAN2 Global Mask Register Extended ID1 CAN2 Global Mask Register Extended ID2
C2GMR0 C2GMR1 C2GMR2 C2GMR3 C2GMR4
XXX0 XX00 00002(2) XXXX 00002(2) 0016(2) XX00 00002(2)
00002(2)
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTES: 1. The BANKSEL bit in the C2CTLR1 register switches functions for addresses 01C016 to 01DF16. 2. Values are obtained by setting the SLEEP bit in the C2SLPR register to "1" (sleep mode exited) after reset and supplying a clock to the CAN module.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 29 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 01D016 01D116 01D216 01D316 01D416 01D516 01D616 01D716 01D816 01D916 01DA16 01DB16 01DC16
Register CAN2 Message Slot 0 Control Register / CAN2 Local Mask Register A Standard ID0 CAN2 Message Slot 1 Control Register / CAN2 Local Mask Register A Standard ID1 CAN2 Message Slot 2 Control Register / CAN2 Local Mask Register A Extended ID0 CAN2 Message Slot 3 Control Register / CAN2 local Mask Register A Extended ID1 CAN2 Message Slot 4 Control Register / CAN2 Local Mask Register A Extended ID2 CAN2 Message Slot 5 Control Register CAN2 Message Slot 6 Control Register CAN2 Message Slot 7 Control Register CAN2 Message Slot 8 Control Register / CAN2 Local Mask Register B Standard ID0 CAN2 Message Slot 9 Control Register / CAN2 Local Mask Register B Standard ID1 CAN2 Message Slot 10 Control Register / CAN2 Local Mask Register B Extended ID2 CAN2 Message Slot 11 Control Register / CAN2 Local Mask Register B Extended ID3 CAN2 Message Slot 12 Control Register /
Symbol C2MCTL0/ C2LMAR0 C2MCTL1/ C2LMAR1 C2MCTL2/ C2LMAR2 C2MCTL3/ C2LMAR3 C2MCTL4/ C2LMAR4 C2MCTL5 C2MCTL6 C2MCTL7 C2MCTL8/ C2LMBR0 C2MCTL9/ C2LMBR1 C2MCTL10/ C2LMBR2 C2MCTL11/ C2LMBR3 C2MCTL12/ C2LMBR4 C2MCTL13 C2MCTL14 C2MCTL15
Value after RESET 0000 00002(2) XXX0 00002(2) 0000 00002(2) XX00 00002(2) 0000 00002(2) XXXX 00002(2) 0016(2) 0016(2) 0000 00002(2) XX00 00002(2) 0016(2) 0016(2) 0016(2) 0000 00002(2) XXX0 00002(2) 0000 00002(2) XX00 00002(2) 0000 00002(2) XXXX 00002(2) 0016(2) 0016(2) 0000 00002(2) XX00 00002(2) 0016(2) 0016(2) 0016(2)
(Note 1)
CAN2 Local Mask Register B Extended ID4 01DD16 CAN2 Message Slot 13 Control Register 01DE16 CAN2 Message Slot 14 Control Register 01DF16 CAN2 Message Slot 15 Control Register
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTES: 1. The BANKSEL bit in the C2CTLR1 register switches functions for addresses 01C016 to 01DF16. 2. Values are obtained by setting the SLEEP bit in the C2SLPR register to "1" (sleep mode exited) after reset and supplying a clock to the CAN module.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 30 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 01E016 01E116 01E216 01E316 01E416 01E516 01E616 01E716 01E816 01E916 01EA16 01EB16 01EC16 01ED16 01EE16 01EF16 01F016 01F116 01F216 01F316 01F416 01F516 01F616 01F716 01F816 01F916 01FA16 01FB16 01FC16 01FD16 01FE16 01FF16 020016 020116 020216 020316 020416 020516 020616 020716 020816 020916 020A16 020B16 020C16 020D16 020E16 020F16
Register CAN0 Message Slot Buffer 0 Standard ID0 CAN0 Message Slot Buffer 0 Standard ID1 CAN0 Message Slot Buffer 0 Extended ID0 CAN0 Message Slot Buffer 0 Extended ID1 CAN0 Message Slot Buffer 0 Extended ID2 CAN0 Message Slot Buffer 0 Data Length Code CAN0 Message Slot Buffer 0 Data 0 CAN0 Message Slot Buffer 0 Data 1 CAN0 Message Slot Buffer 0 Data 2 CAN0 Message Slot Buffer 0 Data 3 CAN0 Message Slot Buffer 0 Data 4 CAN0 Message Slot Buffer 0 Data 5 CAN0 Message Slot Buffer 0 Data 6 CAN0 Message Slot Buffer 0 Data 7 CAN0 Message Slot Buffer 0 Time Stamp High-Order CAN0 Message Slot Buffer 0 Time Stamp Low-Order CAN0 Message Slot Buffer 1 Standard ID0 CAN0 Message Slot Buffer 1 Standard ID1 CAN0 Message Slot Buffer 1 Extended ID0 CAN0 Message Slot Buffer 1 Extended ID1 CAN0 Message Slot Buffer 1 Extended ID2 CAN0 Message Slot Buffer 1 Data Length Code CAN0 Message Slot Buffer 1 Data 0 CAN0 Message Slot Buffer 1 Data 1 CAN0 Message Slot Buffer 1 Data 2 CAN0 Message Slot Buffer 1 Data 3 CAN0 Message Slot Buffer 1 Data 4 CAN0 Message Slot Buffer 1 Data 5 CAN0 Message Slot Buffer 1 Data 6 CAN0 Message Slot Buffer 1 Data 7 CAN0 Message Slot Buffer 1 Time Stamp High-Order CAN0 Message Slot Buffer 1 Time Stamp Low-Order CAN0 Control Register 0 CAN0 Status Register CAN0 Extended ID Register CAN0 Configuration Register CAN0 Time Stamp Register CAN0 Transmit Error Count Register CAN0 Receive Error Count Register CAN0 Slot Interrupt Status Register
Symbol C0SLOT0_0 C0SLOT0_1 C0SLOT0_2 C0SLOT0_3 C0SLOT0_4 C0SLOT0_5 C0SLOT0_6 C0SLOT0_7 C0SLOT0_8 C0SLOT0_9 C0SLOT0_10 C0SLOT0_11 C0SLOT0_12 C0SLOT0_13 C0SLOT0_14 C0SLOT0_15 C0SLOT1_0 C0SLOT1_1 C0SLOT1_2 C0SLOT1_3 C0SLOT1_4 C0SLOT1_5 C0SLOT1_6 C0SLOT1_7 C0SLOT1_8 C0SLOT1_9 C0SLOT1_10 C0SLOT1_11 C0SLOT1_12 C0SLOT1_13 C0SLOT1_14 C0SLOT1_15 C0CTLR0 C0STR C0IDR C0CONR C0TSR C0TEC C0REC C0SISTR
Value after RESET XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX01 0X012(1) XXXX 00002(1) 0000 00002(1) X000 0X012(1) 0016(1) 0016(1) 0000 XXXX2(1) 0000 00002(1) 0016(1) 0016(1) 0016(1) 0016(1) 0016(1) 0016(1)
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTE: 1. Values are obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) after reset and supplying a clock to the CAN module.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 31 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 021016 021116 021216 021316 021416 021516 021616 021716 021816 021916 021A16 021B16 021C16 021D16 021E16 021F16 022016 022116 022216 022316 022416 022516 022616 022716 022816 022916 022A16 022B16 022C16 022D16 022E16 022F16 023016 023116 023216 023316 023416 023516 023616 023716 023816 023916
Register CAN0 Slot Interrupt Mask Register
Symbol C0SIMKR
Value after RESET 0016(2) 0016(2)
CAN0 Error Interrupt Mask Register CAN0 Error Interrupt Status Register CAN0 Error Cause Register CAN0 Baud Rate Prescaler CAN0 Mode Register
C0EIMKR C0EISTR C0EFR C0BRP C0MDR
XXXX X0002(2) XXXX X0002(2) 0016(2) 0000 00012(2) XXXX XX002(2)
CAN0 Single Shot Control Register
C0SSCTLR
0016(2) 0016(2)
CAN0 Single Shot Status Register
C0SSSTR
0016(2) 0016(2)
CAN0 Global Mask Register Standard ID0 CAN0 Global Mask Register Standard ID1 CAN0 Global Mask Register Extended ID0 CAN0 Global Mask Register Extended ID1 CAN0 Global Mask Register Extended ID2
C0GMR0 C0GMR1 C0GMR2 C0GMR3 C0GMR4
XXX0 00002(2) XX00 00002(2) XXXX 00002(2) 0016(2) XX00 00002(2)
CAN0 Message Slot 0 Control Register / CAN0 Local Mask Register A Standard ID0 CAN0 Message Slot 1 Control Register / CAN0 Local Mask Register A Standard ID1 CAN0 Message Slot 2 Control Register / CAN0 Local Mask Register A Extended ID0 CAN0 Message Slot 3 Control Register / CAN0 local Mask Register A Extended ID1 CAN0 Message Slot 4 Control Register / CAN0 Local Mask Register A Extended ID2 CAN0 Message Slot 5 Control Register CAN0 Message Slot 6 Control Register CAN0 Message Slot 7 Control Register CAN0 Message Slot 8 Control Register / CAN0 Local Mask Register B Standard ID0 CAN0 Message Slot 9 Control Register / CAN0 Local Mask Register B Standard ID1
C0MCTL0/ C0LMAR0 C0MCTL1/ C0LMAR1 C0MCTL2/ C0LMAR2 C0MCTL3/ C0LMAR3 C0MCTL4/ C0LMAR4 C0MCTL5 C0MCTL6 C0MCTL7 C0MCTL8/ C0LMBR0 C0MCTL9/ C0LMBR1
0000 00002(2) XXX0 0000 00002(2) 00002(2)
(Note 1)
XX00 00002(2) 0000 00002(2) XXXX 00002(2) 0016(2) 0016(2) 0000 00002(2) XX00 00002(2) 0016(2) 0016(2) 0016(2) 0000 00002(2) XXX0 00002(2) 0000 00002(2) XX00 00002(2)
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTES: 1. The BANKSEL bit in the C0CTLR1 register switches functions for addresses 022016 to 023F16. 2. Values are obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) after reset and supplying a clock to the CAN module. Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110 Page 32 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 023A16 023B16 023C16 023D16 023E16 023F16 024016 024116 024216 024316 024416 024516 024616 024716 024816 024916 024A16 024B16 024C16 024D16 024E16 024F16 025016 025116 025216 025316 025416 025516 025616 025716 025816 025916 025A16 025B16 025C16 025D16 025E16 025F16
Register CAN0 Message Slot 10 Control Register / CAN0 Local Mask Register B Extended ID0 CAN0 Message Slot 11 Control Register / CAN0 Local Mask Register B Extended ID1 CAN0 Message Slot 12 Control Register / CAN0 Local Mask Register B Extended ID2 CAN0 Message Slot 13 Control Register CAN0 Message Slot 14 Control Register CAN0 Message Slot 15 Control Register CAN0 Slot Buffer Select Register CAN0 Control Register 1 CAN0 Sleep Control Register
Symbol C0MCTL10/ C0LMBR2 C0MCTL11/ C0LMBR3 C0MCTL12/ C0LMBR4 C0MCTL13 C0MCTL14 C0MCTL15 C0SBS C0CTLR1 C0SLPR
Value after RESET 0000 00002(2) XXXX 00002(2) 0016(2) 0016(2) 0000 00002(2) XX00 00002(2) 0016(2) 0016(2) 0016(2) 0016(2) X000 00XX2(2) XXXX XXX02 0016(2) 0116(2)
(Note 1)
CAN0 Acceptance Filter Support Register
C0AFS
CAN1 Slot Buffer Select Register CAN1 Control Register 1 CAN1 Sleep Control Register
C1SBS C1CTLR1 C1SLPR
0016(3) X000 00XX2(3) XXXX XXX02(3) 0016(3) 0116(3)
CAN1 Acceptance Filter Support Register
C1AFS
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTES: 1. The BANKSEL bit in the C0CTLR1 register switches functions for addresses 022016 to 023F16. 2. Values are obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) after reset and supplying a clock to the CAN module. 3. Values are obtained by setting the SLEEP bit in the C1SLPR register to "1" (sleep mode exited) after reset and supplying a clock to the CAN module.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 33 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 026016 026116 026216 026316 026416 026516 026616 026716 026816 026916 026A16 026B16 026C16 026D16 026E16 026F16 027016 027116 027216 027316 027416 027516 027616 027716 027816 027916 027A16 027B16 027C16 027D16 027E16 027F16 028016 028116 028216 028316 028416 028516 028616 028716 028816 028916 028A16 028B16 028C16 028D16 028E16 028F16
Register CAN1 Message Slot Buffer 0 Standard ID0 CAN1 Message Slot Buffer 0 Standard ID1 CAN1 Message Slot Buffer 0 Extended ID0 CAN1 Message Slot Buffer 0 Extended ID1 CAN1 Message Slot Buffer 0 Extended ID2 CAN1 Message Slot Buffer 0 Data Length Code CAN1 Message Slot Buffer 0 Data 0 CAN1 Message Slot Buffer 0 Data 1 CAN1 Message Slot Buffer 0 Data 2 CAN1 Message Slot Buffer 0 Data 3 CAN1 Message Slot Buffer 0 Data 4 CAN1 Message Slot Buffer 0 Data 5 CAN1 Message Slot Buffer 0 Data 6 CAN1 Message Slot Buffer 0 Data 7 CAN1 Message Slot Buffer 0 Time Stamp High-Order CAN1 Message Slot Buffer 0 Time Stamp Low-Order CAN1 Message Slot Buffer 1 Standard ID0 CAN1 Message Slot Buffer 1 Standard ID1 CAN1 Message Slot Buffer 1 Extended ID0 CAN1 Message Slot Buffer 1 Extended ID1 CAN1 Message Slot Buffer 1 Extended ID2 CAN1 Message Slot Buffer 1 Data Length Code CAN1 Message Slot Buffer 1 Data 0 CAN1 Message Slot Buffer 1 Data 1 CAN1 Message Slot Buffer 1 Data 2 CAN1 Message Slot Buffer 1 Data 3 CAN1 Message Slot Buffer 1 Data 4 CAN1 Message Slot Buffer 1 Data 5 CAN1 Message Slot Buffer 1 Data 6 CAN1 Message Slot Buffer 1 Data 7 CAN1 Message Slot Buffer 1 Time Stamp High-Order CAN1 Message Slot Buffer 1 Time Stamp Low-Order CAN1 Control Register 0 CAN1 Status Register CAN1 Extended ID Register CAN1 Configuration Register CAN1 Time Stamp Register CAN1 Transmit Error Count Register CAN1 Receive Error Count Register CAN1 Slot Interrupt Status Register
Symbol C1SLOT0_0 C1SLOT0_1 C1SLOT0_2 C1SLOT0_3 C1SLOT0_4 C1SLOT0_5 C1SLOT0_6 C1SLOT0_7 C1SLOT0_8 C1SLOT0_9 C1SLOT0_10 C1SLOT0_11 C1SLOT0_12 C1SLOT0_13 C1SLOT0_14 C1SLOT0_15 C1SLOT1_0 C1SLOT1_1 C1SLOT1_2 C1SLOT1_3 C1SLOT1_4 C1SLOT1_5 C1SLOT1_6 C1SLOT1_7 C1SLOT1_8 C1SLOT1_9 C1SLOT1_10 C1SLOT1_11 C1SLOT1_12 C1SLOT1_13 C1SLOT1_14 C1SLOT1_15 C1CTLR0 C1STR C1IDR C1CONR C1TSR C1TEC C1REC C1SISTR
Value after RESET XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX01 0X012(1) XXXX 00002(1) 0000 00002(1) X000 0X012(1) 0016(1) 0016(1) 0000 XXXX2(1) 0000 00002(1) 0016(1) 0016(1) 0016(1) 0016(1) 0016(1) 0016(1)
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTE: 1. Values are obtained by setting the SLEEP bit in the C1SLPR register to "1" (sleep mode exited) after reset and supplying the clock to the CAN module.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 34 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 029016 029116 029216 029316 029416 029516 029616 029716 029816 029916 029A16 029B16 029C16 029D16 029E16 029F16 02A016 02A116 02A216 02A316 02A416 02A516 02A616 02A716 02A816 02A916 02AA16 02AB16 02AC16 02AD16 02AE16 02AF16 02B016 02B116 02B216 02B316 02B416 02B516 02B616 02B716 02B816 02B916
Register CAN1 Slot Interrupt Mask Register
Symbol C1SIMKR
Value after RESET 0016(2) 0016(2)
CAN1 Error Interrupt Mask Register CAN1 Error Interrupt Status Register CAN1 Error Factor Register CAN1 Baud Rate Prescaler CAN1 Mode Register
C1EIMKR C1EISTR C1EFR C1BRP C1MDR
XXXX X0002(2) XXXX X0002(2) 0016(2) 0000 00012(2) XXXX XX002(2)
CAN1 Single Shot Control Register
C1SSCTLR
0016(2) 0016(2)
CAN1 Single Shot Status Register
C1SSSTR
0016(2) 0016(2)
CAN1 Global Mask Register Standard ID0 CAN1 Global Mask Register Standard ID1 CAN1 Global Mask Register Extended ID0 CAN1 Global Mask Register Extended ID1 CAN1 Global Mask Register Extended ID2
C1GMR0 C1GMR1 C1GMR2 C1GMR3 C1GMR4
XXX0 00002(2) XX00 00002(2) XXXX 00002(2) 0016(2) XX00 00002(2)
CAN1 Message Slot 0 Control Register / CAN1 Local Mask Register A Standard ID0 CAN1 Message Slot 1 Control Register / CAN1 Local Mask Register A Standard ID1 CAN1 Message Slot 2 Control Register / CAN1 Local Mask Register A Extended ID0 CAN1 Message Slot 3 Control Register / CAN1 Local Mask Register A Extended ID1 CAN1 Message Slot 4 Control Register / CAN1 Local Mask Register A Extended ID2 CAN1 Message Slot 5 Control Register CAN1 Message Slot 6 Control Register CAN1 Message Slot 7 Control Register CAN1 Message Slot 8 Control Register / CAN1 Local Mask Register B Standard ID0 CAN1 Message Slot 9 Control Register / CAN1 Local Mask Register B Standard ID1
C1MCTL0/ C1LMAR0 C1MCTL1/ C1LMAR1 C1MCTL2/ C1LMAR2 C1MCTL3/ C1LMAR3 C1MCTL4/ C1LMAR4 C1MCTL5 C1MCTL6 C1MCTL7 C1MCTL8/ C1LMBR0 C1MCTL9/ C1LMBR1
0000 00002(2) XXX0 0000 00002(2) 00002(2)
(Note 1)
XX00 00002(2) 0000 00002(2) XXXX 00002(2) 0016(2) 0016(2) 0000 00002(2) XX00 00002(2) 0016(2) 0016(2) 0016(2) 0000 00002(2) XXX0 00002(2) 0000 00002(2) XX00 00002(2)
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTES: 1. The BANKSEL bit in the C1CTLR1 register switches functions for addresses 02A016 to 02BF16. 2. Values are obtained by setting the SLEEP bit in the C1SLPR register to "1" (sleep mode exited) after reset and supplying a clock to the CAN module. Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110 Page 35 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 02BA16 02BB16 02BC16
Register CAN1 Message Slot 10 Control Register / CAN1 Local Mask Register B Extended ID0 CAN1 Message Slot 11 Control Register / CAN1 Local Mask Register B Extended ID1 CAN1 Message Slot 12 Control Register /
Symbol C1MCTL10/ C1LMBR2 C1MCTL11/ C1LMBR3 C1MCTL12/ C1LMBR4 C1MCTL13 C1MCTL14 C1MCTL15 X0R,Y0R X1R,Y1R X2R,Y2R X3R,Y3R X4R,Y4R X5R,Y5R X6R,Y6R X7R,Y7R X8R,Y8R X9R,Y9R X10R,Y10R X11R,Y11R X12R,Y12R X13R,Y13R X14R,Y14R X15R,Y15R
Value after RESET 0000 00002(2) XXXX 00002(2) 0016(2) 0016(2) 0000 00002(2) XX00 00002(2) 0016(2) 0016(2) 0016(2) XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16
(Note 1)
CAN1 Local Mask Register B Extended ID2 02BD16 CAN1 Message Slot 13 Control Register 02BE16 CAN1 Message Slot 14 Control Register 02BF16 CAN1 Message Slot 15 Control Register 02C016 X0 Register Y0 Register 02C116 02C216 X1 Register Y1 Register 02C316 02C416 X2 Register Y2 Register 02C516 02C616 X3 Register Y3 Register 02C716 02C816 X4 Register Y4 Register 02C916 02CA16 X5 Register Y5 Register 02CB16 02CC16 X6 Register Y6 Register 02CD16 02CE16 X7 Register Y7 Register 02CF16 02D016 X8 Register Y8 Register 02D116 02D216 X9 Register Y9 Register 02D316 02D416 X10 Register Y10 Register 02D516 02D616 X11 Register Y11 Register 02D716 02D816 X12 Register Y12 Register 02D916 02DA16 X13 Register Y13 Register 02DB16 02DC16 X14 Register Y14 Register 02DD16 02DE16 X15 Register Y15 Register 02DF16
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTES: 1. The BANKSEL bit in the C1CTLR1 register switches functions for addresses 02A016 to 02BF16. 2. Values are obtained by setting the SLEEP bit in the C1SLPR register to "1" (sleep mode exited) after reset and supplying a clock to the CAN module.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 36 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 02E016 02E116 02E216 02E316 02E416 02E516 02E616 02E716 02E816 02E916 02EA16
Register X/Y Control Register
Symbol XYC
Value after RESET XXXX XX002
UART1 Special Mode Register 4 UART1 Special Mode Register 3 UART1 Special Mode Register 2 UART1 Special Mode Register UART1 Transmit/Receive Mode Register UART1 Bit Rate Register
U1SMR4 U1SMR3 U1SMR2 U1SMR U1MR U1BRG U1TB U1C0 U1C1 U1RB
0016 0016 0016 0016 0016 XX16 XX16 XX16 0000 10002 0000 00102 XX16 XX16
UART1 Transmit Buffer Register 02EB16 02EC16 UART1 Transmit/Receive Control Register 0 02ED16 UART1 Transmit/Receive Control Register 1 02EE16 UART1 Receive Buffer Register 02EF16 02F016 02F116 02F216 02F316 02F416 UART4 Special Mode Register 4 02F516 UART4 Special Mode Register 3 02F616 UART4 Special Mode Register 2 02F716 UART4 Special Mode Register 02F816 UART4 Transmit/Receive Mode Register 02F916 UART4 Bit Rate Register 02FA16 UART4 Transmit Buffer Register 02FB16 02FC16 UART4 Transmit/Receive Control Register 0 02FD16 UART4 Transmit/Receive Control Register 1 02FE16 UART4 Receive Buffer Register 02FF16 030016 Timer B3, B4, B5 Count Start Flag 030116 030216 Timer A1-1 Register 030316 030416 Timer A2-1 Register 030516 030616 Timer A4-1 Register 030716 030816 Three-Phase PWM Control Register 0 030916 Three-Phase PWM Control Register 1 030A16 Three-Phase Output Buffer Register 0 030B16 Three-Phase Output Buffer Register 1 030C16 Dead Time Timer 030D16 Timer B2 Interrupt Generation Frequency Set Counter 030E16 030F16
U4SMR4 U4SMR3 U4SMR2 U4SMR U4MR U4BRG U4TB U4C0 U4C1 U4RB TBSR
0016 0016 0016 0016 0016 XX16 XX16 XX16 0000 10002 0000 00102 XX16 XX16 000X XXXX2 XX16
TA11 TA21 TA41 INVC0 INVC1 IDB0 IDB1 DTT ICTB2
XX16 XX16 XX16 XX16 XX16 0016 0016 XX11 11112 XX11 11112 XX16 XX16
X: Indeterminate Blank spaces are reserved. No access is allowed.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 37 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 031016 031116 031216 031316 031416 031516 031616 031716 031816 031916 031A16 031B16 031C16 031D16 031E16 031F16 032016 032116 032216 032316 032416 032516 032616 032716 032816 032916 032A16 032B16 032C16 032D16 032E16 032F16 033016 033116 033216 033316 033416 033516 033616 033716 033816 033916 033A16 033B16 033C16 033D16 033E16 033F16 Timer B3 Register Timer B4 Register Timer B5 Register
Register
Symbol TB3 TB4 TB5
Value after RESET XX16 XX16 XX16 XX16 XX16 XX16
Timer B3 Mode Register Timer B4 Mode Register Timer B5 Mode Register External Interrupt Request Source Select Register
TB3MR TB4MR TB5MR IFSR
00XX 00002 00XX 00002 00XX 00002 0016
UART3 Special Mode Register 4 UART3 Special Mode Register 3 UART3 Special Mode Register 2 UART3 Special Mode Register UART3 Transmit/Receive Mode Register UART3 Bit Rate Register UART3 Transmit Buffer Register UART3 Transmit/Receive Control Register 0 UART3 Transmit/Receive Control Register 1 UART3 Receive Buffer Register
U3SMR4 U3SMR3 U3SMR2 U3SMR U3MR U3BRG U3TB U3C0 U3C1 U3RB
0016 0016 0016 0016 0016 XX16 XX16 XX16 0000 10002 0000 00102 XX16 XX16
UART2 Special Mode Register 4 UART2 Special Mode Register 3 UART2 Special Mode Register 2 UART2 Special Mode Register UART2 Transmit/Receive Mode Register UART2 Bit Rate Register UART2 Transmit Buffer Register UART2 Transmit/Receive Control Register 0 UART2 Transmit/Receive Control Register 1 UART2 Receive Buffer Register
U2SMR4 U2SMR3 U2SMR2 U2SMR U2MR U2BRG U2TB U2C0 U2C1 U2RB
0016 0016 0016 0016 0016 XX16 XX16 XX16 0000 10002 0000 00102 XX16 XX16
X: Indeterminate Blank spaces are reserved. No access is allowed.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 38 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 034016 034116 034216 034316 034416 034516 034616 034716 034816 034916 034A16 034B16 034C16 034D16 034E16 034F16 035016 035116 035216 035316 035416 035516 035616 035716 035816 035916 035A16 035B16 035C16 035D16 035E16 035F16 036016 036116 036216 036316 036416 036516 036616 036716 036816 036916 036A16 036B16 036C16 036D16 036E16 036F16
Register Count Start Flag Clock Prescaler Reset Flag One-Shot Start Flag Trigger Select Register Up/Down Flag
Symbol TABSR CPSRF ONSF TRGSR UDF
Value after RESET 0016 0XXX XXXX2 0016 0016 0016 XX16
Timer A0 Register Timer A1 Register Timer A2 Register Timer A3 Register Timer A4 Register Timer B0 Register Timer B1 Register Timer B2 Register Timer A0 Mode Register Timer A1 Mode Register Timer A2 Mode Register Timer A3 Mode Register Timer A4 Mode Register Timer B0 Mode Register Timer B1 Mode Register Timer B2 Mode Register Timer B2 Special Mode Register Count Source Prescaler Register(1)
TA0 TA1 TA2 TA3 TA4 TB0 TB1 TB2 TA0MR TA1MR TA2MR TA3MR TA4MR TB0MR TB1MR TB2MR TB2SC TCSPR
XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 0016 0016 0016 0016 0016 00XX 00002 00XX 00002 00XX 00002 XXXX XXX02 0XXX 00002
UART0 Special Mode Register 4 UART0 Special Mode Register 3 UART0 Special Mode Register 2 UART0 Special Mode Register UART0 Transmit/Receive Mode Register UART0 Bit Rate Register UART0 Transmit Buffer Register UART0 Transmit/Receive Control Register 0 UART0 Transmit/Receive Control Register 1 UART0 Receive Buffer Register
U0SMR4 U0SMR3 U0SMR2 U0SMR U0MR U0BRG U0TB U0C0 U0C1 U0RB
0016 0016 0016 0016 0016 XX16 XX16 XX16 0000 10002 0000 00102 XX16 XX16
X: Indeterminate Blank spaces are reserved. No access is allowed. NOTE: 1. The TCSPR register maintains values set before reset, even after software reset or watchdog timer reset has been performed.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 39 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
Address 037016 037116 037216 037316 037416 037516 037616 037716 037816 037916 037A16 037B16 037C16 037D16 037E16 037F16 038016 038116 038216 038316 038416 038516 038616 038716 038816 038916 038A16 038B16 038C16 038D16 038E16 038F16 039016 039116 039216 039316 039416 039516 039616 039716 039816 039916 039A16 039B16 039C16 039D16 039E16 039F16
Register
Symbol
Value after RESET
DMA0 Request Source Select Register DMA1 Request Source Select Register DMA2 Request Source Select Register DMA3 Request Source Select Register CRC Data Register CRC Input Register
DM0SL DM1SL DM2SL DM3SL CRCD CRCIN
0X00 00002 0X00 00002 0X00 00002 0X00 00002 XX16 XX16 XX16 XXXX XXXX2 0000 00002 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16 XX16
A/D0 Register 0 A/D0 Register 1 A/D0 Register 2 A/D0 Register 3 A/D0 Register 4 A/D0 Register 5 A/D0 Register 6 A/D0 Register 7
AD00 AD01 AD02 AD03 AD04 AD05 AD06 AD07
A/D0 Control Register 4 A/D0 Control Register 2 A/D0 Control Register 3 A/D0 Control Register 0 A/D0 Control Register 1 D/A Register 0 D/A Register 1 D/A Control Register
AD0CON4 AD0CON2 AD0CON3 AD0CON0 AD0CON1 DA0 DA1 DACON
XXXX 00XX2 XX0X X0002 XXXX X0002 0016 0016 XX16 XX16 XXXX XX002
X: Indeterminate Blank spaces are reserved. No access is allowed.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 40 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
<144-pin package>
Address 03A016 03A116 03A216 03A316 03A416 03A516 03A616 03A716 03A816 03A916 03AA16 03AB16 03AC16 03AD16 03AE16 03AF16 03B016 03B116 03B216 03B316 03B416 03B516 03B616 03B716 03B816 03B916 03BA16 03BB16 03BC16 03BD16 03BE16 03BF16 03C016 03C116 03C216 03C316 03C416 03C516 03C616 03C716 03C816 03C916 03CA16 03CB16 03CC16 03CD16 03CE16 03CF16 Register Function Select Register A8 Function Select Register A9 Symbol PS8 PS9 Value after RESET X000 00002 0016
Function Select Register D1
PSD1
X0XX XX002
Function Select Register C2 Function Select Register C3 Function Select Register C Function Select Register A0 Function Select Register A1 Function Select Register B0 Function Select Register B1 Function Select Register A2 Function Select Register A3 Function Select Register B2 Function Select Register B3 Function Select Register A5
PSC2 PSC3 PSC PS0 PS1 PSL0 PSL1 PS2 PS3 PSL2 PSL3 PS5
XXXX X00X2 X0XX XXXX2 00X0 00002 0016 0016 0016 0016 00X0 00002 0016 00X0 00002 0016 XXX0 00002
Port P6 Register Port P7 Register Port P6 Direction Register Port P7 Direction Register Port P8 Register Port P9 Register Port P8 Direction Register Port P9 Direction Register Port P10 Register Port P11 Register Port P10 Direction Register Port P11 Direction Register Port P12 Register Port P13 Register Port P12 Direction Register Port P13 Direction Register
P6 P7 PD6 PD7 P8 P9 PD8 PD9 P10 P11 PD10 PD11 P12 P13 PD12 PD13
XX16 XX16 0016 0016 XX16 XX16 00X0 00002 0016 XX16 XX16 0016 XXX0 00002 XX16 XX16 0016 0016
X: Indeterminate Blank spaces are reserved. No access is allowed.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 41 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
<144-pin package>
Address 03D016 03D116 03D216 03D316 03D416 03D516 03D616 03D716 03D816 03D916 03DA16 03DB16 03DC16 03DD16 03DE16 03DF16 03E016 03E116 03E216 03E316 03E416 03E516 03E616 03E716 03E816 03E916 03EA16 03EB16 03EC16 03ED16 03EE16 03EF16 03F016 03F116 03F216 03F316 03F416 03F516 03F616 03F716 03F816 03F916 03FA16 03FB16 03FC16 03FD16 03FE16 03FF16 Register Port P14 Register Port P15 Register Port P14 Direction Register Port P15 Direction Register Symbol P14 P15 PD14 PD15 Value after RESET XX16 XX16 X000 00002 0016
Pull-Up Control Register 2 Pull-Up Control Register 3 Pull-Up Control Register 4
PUR2 PUR3 PUR4
0016 0016 XXXX 00002
Port P0 Register Port P1 Register Port P0 Direction Register Port P1 Direction Register Port P2 Register Port P3 Register Port P2 Direction Register Port P3 Direction Register Port P4 Register Port P5 Register Port P4 Direction Register Port P5 Direction Register
P0 P1 PD0 PD1 P2 P3 PD2 PD3 P4 P5 PD4 PD5
XX16 XX16 0016 0016 XX16 XX16 0016 0016 XX16 XX16 0016 0016
Pull-Up Control Register 0 Pull-Up Control Register 1
PUR0 PUR1
0016 XXXX 00002
Port Control Register
PCR
XXXX XXX02
X: Indeterminate Blank spaces are reserved. No access is allowed.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 42 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
<100-pin package>
Address 03A016 03A116 03A216 03A316 03A416 03A516 03A616 03A716 03A816 03A916 03AA16 03AB16 03AC16 03AD16 03AE16 03AF16 03B016 03B116 03B216 03B316 03B416 03B516 03B616 03B716 03B816 03B916 03BA16 03BB16 03BC16 03BD16 03BE16 03BF16 03C016 03C116 03C216 03C316 03C416 03C516 03C616 03C716 03C816 03C916 03CA16 03CB16 03CC16 03CD16 03CE16 03CF16 Register Symbol Value after RESET
Function Select Register D1
PSD1
X0XX XX002
Function Select Register C2 Function Select Register C3 Function Select Register C Function Select Register A0 Function Select Register A1 Function Select Register B0 Function Select Register B1 Function Select Register A2 Function Select Register A3 Function Select Register B2 Function Select Register B3
PSC2 PSC3 PSC PS0 PS1 PSL0 PSL1 PS2 PS3 PSL2 PSL3
XXXX X00X2 X0XX XXXX2 00X0 00002 0016 0016 0016 0016 00X0 00002 0016 00X0 00002 0016
Port P6 Register Port P7 Register Port P6 Direction Register Port P7 Direction Register Port P8 Register Port P9 Register Port P8 Direction Register Port P9 Direction Register Port P10 Register Port P10 Direction Register Set default value to "FF16"
P6 P7 PD6 PD7 P8 P9 PD8 PD9 P10 PD10
XX16 XX16 0016 0016 XX16 XX16 00X0 00002 0016 XX16 0016
Set default value to "FF16" Set default value to "FF16"
X: Indeterminate Blank spaces are reserved. No access is allowed.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 43 of 435
M32C/88 Group (M32C/88T)
4. Special Function Registers (SFRs)
<100-pin package>
Address 03D016 03D116 03D216 03D316 03D416 03D516 03D616 03D716 03D816 03D916 03DA16 03DB16 03DC16 03DD16 03DE16 03DF16 03E016 03E116 03E216 03E316 03E416 03E516 03E616 03E716 03E816 03E916 03EA16 03EB16 03EC16 03ED16 03EE16 03EF16 03F016 03F116 03F216 03F316 03F416 03F516 03F616 03F716 03F816 03F916 03FA16 03FB16 03FC16 03FD16 03FE16 03FF16 Register Symbol Value after RESET
Set default value to "FF16" Set default value to "FF16"
Pull-Up Control Register 2 Pull-Up Control Register 3 Set default value to "0016"
PUR2 PUR3
0016 0016
Port P0 Register Port P1 Register Port P0 Direction Register Port P1 Direction Register Port P2 Register Port P3 Register Port P2 Direction Register Port P3 Direction Register Port P4 Register Port P5 Register Port P4 Direction Register Port P5 Direction Register
P0 P1 PD0 PD1 P2 P3 PD2 PD3 P4 P5 PD4 PD5
XX16 XX16 0016 0016 XX16 XX16 0016 0016 XX16 XX16 0016 0016
Pull-up Control Register 0 Pull-up Control Register 1
PUR0 PUR1
0016 XXXX 00002
Port Control Register
PCR
XXXX XXX02
X: Indeterminate Blank spaces are reserved. No access is allowed.
Rev. 1.10 Oct. 18, 2005 REJ09B0162-0110
Page 44 of 435
M32C/88 Group (M32C/88T)
5. Electrical Characteristics
5. Electrical Characteristics
Table 5.1 Absolute Maximum Ratings
Symbol VCC AV CC VI Supply Voltage Analog Supply Voltage Input Voltage RESET, CNVSS, BYTE, P00-P07, P10-P17, P20P27, P30-P37, P40-P47, P50-P57, P60-P67, P72P77, P80-P87, P90-P97, P100-P107, P110-P114, P120-P127, P130-P137, P140-P146, P150-P157(1), VREF, XIN P70, P71 VO Output Voltage P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, P50-P57, P60-P67, P72-P77, P80-P84, P86, P87, P90-P97, P100-P107, P110-P114, P120-P127, P130-P137, P140-P146, P150-P157(1), XOUT P70, P71 Pd Topr Power Dissipation Operating Ambient Temperature during CPU operation T version U version T version U version during flash memory program and erase operation Tstg Storage Temperature NOTE: 1. P11 to P15 are provided in the 144-pin package only. Topr=25 C Parameter Condition VCC=AVCC VCC=AVCC Value -0.3 to 6.0 -0.3 to 6.0 -0.3 to VCC+0.3 Unit V V V
-0.3 to 6.0 -0.3 to VCC+0.3 V
-0.3 to 6.0 500 400 -40 to 85 -40 to 105 0 to 60 -65 to 150 C C mW
Rev. 1.10 Oct. 31, 2005 Page 45 of 57 REJ03B0171-0110
M32C/88 Group (M32C/88T)
5. Electrical Characteristics
Table 5.2 Recommended Operating Conditions (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version)/-40 to 105oC (U version) unless otherwise specified)
Symbol VCC AVCC VSS AVSS VIH Supply Voltage Analog Supply Voltage Supply Voltage Analog Supply Voltage Input High ("H") Voltage P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, P50-P57, P60-P67, P72-P77, P80-P87(3), P90-P97, P100-P107, P110P114, P120-P127, P130-P137(4), P140-P146, P150-P157(4), XIN, RESET, CNVSS, BYTE P70, P71 VIL Input Low ("L") Voltage P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, P50-P57, P60-P67, P72-P77, P80-P87(3), P90-P97, P100-P107, P110P114, P120-P127, P130-P137(4), P140-P146, P150-P157(4), XIN, RESET, CNVSS, BYTE P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, P50-P57, P60P67, P72-P77, P80-P84, P86, P87, P90-P97, P100-P107, P1100.8VCC 0 6.0 0.2VCC V 0.8VCC Parameter Standard Min. 4.2 Typ. 5.0 VCC 0 0 VCC Max. 5.5 Unit V V V V V
IOH(peak)
Peak Output High ("H") Current(2)
-10.0
mA
IOH(avg)
Average Output High ("H") Current(1)
IOL(peak)
P114, P120-P127, P130-P137, P140-P146, P150-P157(4) P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, P50-P57, P60P67, P72-P77, P80-P84, P86, P87, P90-P97, P100-P107, P110P114, P120-P127, P130-P137, P140-P146, P150-P157(4) Peak Output Low P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, P50-P57, P60("L") Current(2) P67, P70-P77, P80-P84, P86, P87, P90-P97, P100-P107, P110P114, P120-P127, P130-P137, P140-P146, P150-P157(4) P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, P50-P57, P60P67, P70-P77, P80-P84, P86, P87, P90-P97, P100-P107, P110P114, P120-P127, P130-P137, P140-P146, P150-P157(4)
-5.0
mA
10.0
mA
IOL(avg)
Average Output Low ("L") Current(1)
5.0
mA
NOTES: 1. Typical values when average output current is 100 ms. 2. Total IOL(peak) for P0, P1, P2, P86, P87, P9, P10, P11, P14 and P15 must be 80 mA or less. Total IOL(peak) for P3, P4, P5, P6, P7, P80 to P84, P12 and P13 must be 80 mA or less. Total IOH(peak) for P0, P1, P2, and P11 must be -40mA or less. Total IOH(peak) for P86, P87, P9, P10, P14 and P15 must be -40 mA or less. Total IOH(peak) for P3, P4, P5, P12 and P13 must be -40 mA or less. Total IOH(peak) for P6, P7, and P80 to P84 must be -40 mA or less. 3. VIH and VIL reference for P87 applies when P87 is used as a programmable input port. It does not apply when P87 is used as XCIN. 4. Ports P11 to P15 are provided in the 144-pin package only.
Rev. 1.10 Oct. 31, 2005 Page 46 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
5. Electrical Characteristics
Table 5.3 Recommended Operating Conditions (Continued) (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version)/-40 to 105oC (U version) unless otherwise specified)
Symbol f(BCLK) f(XIN) f(XCIN) f(Ring) f(PLL) tSU(PLL) CPU Operation Frequency Main Clock Input Frequency Sub Clock Frequency On-chip Oscillator Frequency (VCC=5.0V, Topr=25 C) PLL Clock Frequency Wait Time to Stabilize PLL Frequency Synthesizer VCC=4.2 to 5.5 V VCC=5.0 V 0.5 10 Parameter VCC=4.2 to 5.5 V VCC=4.2 to 5.5 V Standard Min. 0 0 32.768 1 Typ. Max. 32 24 50 2 32 5 Unit MHz MHz kHz MHz MHz ms
Rev. 1.10 Oct. 31, 2005 Page 47 of 57 REJ03B0171-0110
M32C/88 Group (M32C/88T)
5. Electrical Characteristics
VCC=5V
Table 5.4 Electrical Characteristics (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version)/-40 to 105oC (U version), f(BCLK)=32MHz unless otherwise specified)
Symbol VOH Output High ("H") Voltage Parameter Condition Standard Min. VCC-2.0 Typ. Max. VCC Unit V
P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, IOH=-5 mA P50-P57, P60-P67, P72-P77, P80-P84, P86, P87, P90-P97, P100-P107, P110-P114, P120P127, P130-P137, P140-P146, P150-P157(1) P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, IOH=-200 A P50-P57, P60-P67, P72-P77, P80-P84, P86, P87, P90-P97, P100-P107, P110-P114, P120P127, P130-P137, P140-P146, P150-P157(1) XOUT IOH=-1 mA XCOUT High Power Low Power No load applied No load applied
VCC-0.3
VCC
V
3.0 2.5 1.6 2.0
V V
VOL
Output Low ("L") Voltage
P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, IOL=5mA P50-P57, P60-P67, P70-P77, P80-P84, P86, P87, P90-P97, P100-P107, P110-P114, P120P127, P130-P137, P140-P146, P150-P157(1) P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, IOL=200 A P50-P57, P60-P67, P70-P77, P80-P84, P86, P87, P90-P97, P100-P107, P110-P114, P120P127, P130-P137, P140-P146, P150-P157(1) XOUT IOL=1 mA XCOUT High Power Low Power No load applied No load applied 0.2 0 0
V
0.45
V
2.0
V V
VT+-VT- Hysteresis
IIH
Input High ("H") Current
HOLD, RDY, TA0IN-TA4IN, TB0IN-TB5IN, INT0-INT5, ADTRG, CTS0-CTS4, CLK0-CLK4, TA0OUT-TA4OUT, NMI, KI0-KI3, RxD0-RxD4, SCL0-SCL4, SDA0-SDA4 RESET P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, VI=5 V P50-P57, P60-P67, P70-P77, P80-P87, P90-P97, P100-P107, P110-P114, P120-P127, P130P137, P140-P146, P150-P157(1), XIN, RESET, CNVSS, BYTE P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, VI=0 V P50-P57, P60-P67, P70-P77, P80-P87, P90-P97, P100-P107, P110-P114, P120-P127, P130P137, P140-P146, P150-P157(1), XIN, RESET, CNVSS, BYTE P00-P07, P10-P17, P20-P27, P30-P37, P40-P47, VI=0 V P50-P57, P60-P67, P72-P77, P80-P84, P86, P87, P90-P97, P100-P107, P110-P114, P120P127, P130-P137, P140-P146, P150-P157(1)
1.0
V
0.2
1.8 5.0
V A
IIL
Input Low ("L") Current
-5.0
A
RPULLUP Pull-up Resistance
30
50
167
k
Feedback Resistance XIN RfXIN Feedback Resistance XCIN RfXCIN RAM Standby Voltage In stop mode VRAM NOTE: 1. Ports P11 to P15 are provided in the 144-pin package only.
1.5 10 2.0
M M V
Rev. 1.10 Oct. 31, 2005 Page 48 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
5. Electrical Characteristics
VCC=5V
Table 5.4 Electrical Characteristics (Continued) (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version)/-40 to 105oC (U version), f(BCLK)=32MHz unless otherwise specified)
Symbol I CC Parameter Measurement Condition f(BCLK)=32 MHz, Square wave, No division f(BCLK)=32 kHz, In low-power consumption mode, Program running on ROM f(BCLK)=32 kHz, In low-power consumption mode, Program running on RAM(1) f(BCLK)=32 kHz, In wait mode, Topr=25 C While clock stops, Topr=25 C While clock stops, Topr=85 C While clock stops, Topr=105 C While clock stops, Topr=125 C Standard Min. Typ. 28 430 Unit Max. 50 mA A
Power Supply Current In single-chip mode, output pins are left open and other pins are connected to VSS.
25
A
10 0.8 5 50 100 200
A A A A A
NOTE: 1. Value is obtained when setting the FMSTP bit in the FMR0 register to "1" (flash memory stopped).
Rev. 1.10 Oct. 31, 2005 Page 49 of 57 REJ03B0171-0110
M32C/88 Group (M32C/88T)
5. Electrical Characteristics
VCC=5V
Table 5.5 A/D Conversion Characteristics (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version)/-40 to 105oC (U version), f(BCLK)=32MHz unless otherwise specified)
Symbol Resolution Parameter VREF=VCC AN0 to AN7, AN00 to AN07, AN20 to AN27, AN150 to AN157, ANEX0, ANEX1 External op-amp connection mode DNL RLADDER tCONV tCONV tSAMP VREF VIA Differential Nonlinearity Error Offset Error Gain Error Resistor Ladder 10-bit Conversion Time(1, 2) 8-bit Conversion Sampling Time(1) Reference Voltage Analog Input Voltage Time(1, 2) VREF=VCC 8 2.06 1.75 0.188 2 0 VCC VREF Measurement Condition Standard Min. Typ. Max. 10 Bits LSB 3 LSB 7 1 3 3 40 LSB LSB LSB LSB LSB k s s s V V Unit
INL
Integral Nonlinearity Error
VREF=VCC=5V
NOTES: 1. Divide f(XIN), if exceeding 16 MHz, to keep AD frequency at 16 MHz or less. 2. With using the sample and hold function.
Table 5.6 D/A Conversion Characteristics (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version)/-40 to 105oC (U version), f(BCLK)=32MHz unless otherwise specified)
Symbol tSU RO IVREF Resolution Absolute Accuracy Setup Time Output Resistance Reference Power Supply Input Current (Note 1) 4 10 Parameter Measurement Condition Min. Standard Typ. Max. 8 1.0 3 20 1.5 Bits % s k mA Unit
NOTE: 1. Measurement when using one D/A converter. The DAi register (i=0, 1) of the D/A converter, not being used, is set to "0016". The resistor ladder in the A/D converter is excluded. IVREF flows even if the VCUT bit in the AD0CON1 register is set to "0" (no VREF connection).
Rev. 1.10 Oct. 31, 2005 Page 50 REJ03B0171-0110
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M32C/88 Group (M32C/88T)
5. Electrical Characteristics
VCC=5V
Table 5.7 Flash Memory Version Electrical Characteristics (VCC=4.5 to 5.5V at Topr= 0 to 60oC unless otherwise specified)
Symbol Parameter Program and Erase Endurance(2) Word Program Time (VCC=5.0V, Topr=25 C) Lock Bit Program Time Block Erase Time (VCC=5.0V, Topr=25 C) 4-Kbyte Block 8-Kbyte Block 32-Kbyte Block 64-Kbyte Block Standard Min. 100 Typ. 25 25 0.3 0.3 0.5 0.8 Max. 200 200 4 4 4 4 4xn 15 Unit cycles s s s s s s s s
tPS
10 years NOTES: 1. n denotes the number of block to be erased. 2. Number of program-erase cycles per block. If Program and Erase Endurance is n cycle (n=100), each block can be erased and programmed n cycles. For example, if a 4-Kbyte block A is erased after programming a word data 2,048 times, each to a different address, this counts as one program and erase endurance. Data can not be programmed to the same address more than once without erasing the block. (rewrite prohibited).
All-Unlocked-Block Erase Time(1) Wait Time to Stabilize Flash Memory Circuit Data Hold Time (Topr=-40 to 85 C)
Table 5.8 Power Supply Timing
Symbol td(P-R) Parameter Wait Time to Stabilize Internal Supply Voltage when Power-on Measurement Condition Min. VCC=4.2 to 5.5V Standard Typ. Max. 2 ms Unit
td(P-R)
Wait Time to Stabilize Internal Supply Voltage when Power-on
Recommanded Operating Voltage
VCC td(P-R) CPU Clock
Figure 5.1 Power Supply Timing Diagram
Rev. 1.10 Oct. 31, 2005 Page 51 of 57 REJ03B0171-0110
M32C/88 Group (M32C/88T)
5. Electrical Characteristics
VCC=5V
Timing Requirements (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version)/-40 to 105oC (U version) unless otherwise specified) Table 5.9 External Clock Input
Symbol tc tw(H) tw(L) tr tf Parameter External Clock Input Cycle Time External Clock Input High ("H") Width External Clock Input Low ("L") Width External Clock Rise Time External Clock Fall Time Standard Min. 31.25 13.75 13.75 5 5 Max. Unit ns ns ns ns ns
Rev. 1.10 Oct. 31, 2005 Page 52 REJ03B0171-0110
of 57
M32C/88 Group (M32C/88T)
5. Electrical Characteristics
VCC=5V
Timing Requirements (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version)/-40 to 105oC (U version) unless otherwise specified) Table 5.10 Timer A Input (Count Source Input in Event Counter Mode)
Symbol tc(TA) tw(TAH) tw(TAL) TAiIN Input Cycle Time TAiIN Input High ("H") Width TAiIN Input Low ("L") Width Parameter Standard Min. 100 40 40 Max. ns ns ns Unit
Table 5.11 Timer A Input (Gate Input in Timer Mode)
Standard Symbol tc(TA) tw(TAH) tw(TAL) TAiIN Input Cycle Time TAiIN Input High ("H") Width TAiIN Input Low ("L") Width Parameter Min. 400 200 200 Max. Unit ns ns ns
Table 5.12 Timer A Input (External Trigger Input in One-Shot Timer Mode)
Standard Symbol tc(TA) tw(TAH) tw(TAL) TAiIN Input Cycle Time TAiIN Input High ("H") Width TAiIN Input Low ("L") Width Parameter Min. 200 100 100 Max. ns ns ns Unit
Table 5.13 Timer A Input (External Trigger Input in Pulse Width Modulation Mode)
Standard Symbol tw(TAH) tw(TAL) TAiIN Input High ("H") Width TAiIN Input Low ("L") Width Parameter Min. 100 100 Max. ns ns Unit
Table 5.14 Timer A Input (Counter Increment/Decrement Input in Event Counter Mode)
Standard Symbol tc(UP) tw(UPH) tw(UPL) tsu(UP-TIN) th(TIN-UP) TAiOUT Input Cycle Time TAiOUT Input High ("H") Width TAiOUT Input Low ("L") Width TAiOUT Input Setup Time TAiOUT Input Hold Time Parameter Min. 2000 1000 1000 400 400 Max. ns ns ns ns ns Unit
Rev. 1.10 Oct. 31, 2005 Page 53 of 57 REJ03B0171-0110
M32C/88 Group (M32C/88T)
5. Electrical Characteristics
VCC=5V
Timing Requirements (VCC=4.2 to 5.5V, VSS=0V at Topr = -40 to 85oC (T version)/-40 to 105oC (U version) unless otherwise specified) Table 5.15 Timer B Input (Count Source Input in Event Counter Mode)
Symbol tc(TB) tw(TBH) tw(TBL) tc(TB) tw(TBH) tw(TBL) Parameter TBiIN Input Cycle Time (counted on one edge) TBiIN Input High ("H") Width (counted on one edge) TBiIN Input Low ("L") Width (counted on one edge) TBiIN Input Cycle Time (counted on both edges) TBiIN Input High ("H") Width (counted on both edges) TBiIN Input Low ("L") Width (counted on both edges) Standard Min. 100 40 40 200 80 80 Max. Unit ns ns ns ns ns ns
Table 5.16 Timer B Input (Pulse Period Measurement Mode)
Symbol tc(TB) tw(TBH) tw(TBL) TBiIN Input Cycle Time TBiIN Input High ("H") Width TBiIN Input Low ("L") Width Parameter Standard Min. 400 200 200 Max. Unit ns ns ns
Table 5.17 Timer B Input (Pulse Width Measurement Mode)
Standard Symbol tc(TB) tw(TBH) tw(TBL) TBiIN Input Cycle Time TBiIN Input High ("H") Width TBiIN Input Low ("L") Width Parameter Min. 400 200 200 Max. ns ns ns Unit
Table 5.18 A/D Trigger Input
Symbol tc(AD) tw(ADL) Parameter ADTRG Input Cycle Time (required for trigger) ADTRG Input Low ("L") Pulse Width Standard Min. 1000 125 Max Unit ns ns
Table 5.19 Serial I/O
Symbol tc(CK) tw(CKH) tw(CKL) td(C-Q) th(C-Q) tsu(D-C) th(C-Q) CLKi Input Cycle Time CLKi Input High ("H") Width CLKi Input Low ("L") Width TxDi Output Delay Time TxDi Hold Time RxDi Input Setup Time RxDi Input Hold Time
_______
Parameter
Standard Min. 200 100 100 80 0 30 90 Max.
Unit ns ns ns ns ns ns ns
Table 5.20 External Interrupt INTi Input
Symbol tw(INH) tw(INL) INTi Input High ("H") Width INTi Input Low ("L") Width Parameter Standard Min. 250 250 Max. Unit ns ns
Rev. 1.10 Oct. 31, 2005 Page 54 REJ03B0171-0110
of 57
M32C/88 Group (M32C/88T)
5. Electrical Characteristics
VCC=5V
P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 NOTE: 1. Ports P11 to P15 are provided in the 144-pin package only. Note 1 30pF
Figure 5.2 P0 to P15 Measurement Circuit
Rev. 1.10 Oct. 31, 2005 Page 55 of 57 REJ03B0171-0110
M32C/88 Group (M32C/88T)
5. Electrical Characteristics
tc(TA) tw(TAH) TAiIN Input tw(TAL) tc(UP) tw(UPH) TAiOUT Input tw(UPL) TAiOUT Input (Counter increment/ decrement input) In event counter mode TAiIN Input
(When counting on the falling edge)
Vcc=5V
th(TIN-UP)
tsu(UP-TIN)
TAiIN Input
(When counting on the rising edge)
tc(TB) tw(TBH) TBiIN Input tw(TBL) tc(AD) tw(ADL) ADTRG Input tc(CK) tw(CKH) CLKi tw(CKL) TxDi td(C-Q) RxDi tw(INL) INTi Input tw(INH) tsu(D-C) th(C-D) th(C-Q)
NMI Input
2 CPU clock cycles + 300ns or more ("L" width) 2 CPU clock cycles + 300ns or more
Figure 5.3 VCC=5V Timing Diagram
Rev. 1.10 Oct. 31, 2005 Page 56 REJ03B0171-0110 of 57
M32C/88 Group (M32C/88T)
Package Dimensions
Package Dimensions
JEITA Package Code P-LQFP144-20x20-0.50 RENESAS Code PLQP0144KA-A Previous Code 144P6Q-A / FP-144L / FP-144LV MASS[Typ.] 1.2g
HD *1 108 D 73 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. bp b1
109
72
c1 HE E
c
Reference Symbol
*2
Dimension in Millimeters
Terminal cross section
1 ZD
A2
A
36 Index mark F
ZE
144
37
L L1
D E A2 HD HE A A1 bp b1 c c1 e x y ZD ZE L L1
*3 e y bp x Detail F
Min Nom Max 19.9 20.0 20.1 19.9 20.0 20.1 1.4 21.8 22.0 22.2 21.8 22.0 22.2 1.7 0.05 0.1 0.15 0.17 0.22 0.27 0.20 0.09 0.145 0.20 0.125 0 8 0.5 0.08 0.10 1.25 1.25 0.35 0.5 0.65 1.0
JEITA Package Code P-LQFP100-14x14-0.50
RENESAS Code PLQP0100KB-A
Previous Code 100P6Q-A / FP-100U / FP-100UV
MASS[Typ.] 0.6g
HD *1 D
75
51 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
76
50
A1
bp b1
HE E
Reference Symbol
c
*2
Dimension in Millimeters
c1
c
Terminal cross section
1 Index mark ZD
25 F
ZE
100
26
A2
A
D E A2 HD HE A A1 bp b1 c c1
c
A1
y e
*3
bp
L L1 Detail F
x
e x y ZD ZE L L1
Min Nom Max 13.9 14.0 14.1 13.9 14.0 14.1 1.4 15.8 16.0 16.2 15.8 16.0 16.2 1.7 0.05 0.1 0.15 0.15 0.20 0.25 0.18 0.09 0.145 0.20 0.125 0 8 0.5 0.08 0.08 1.0 1.0 0.35 0.5 0.65 1.0
Rev. 1.10 Oct. 31, 2005 Page 57 REJ03B0171-0110
of 57
REVISION HISTORY
Rev. Date Page
1.10 Oct.31, 2005
M32C/88 Group (M32C/88T) Datasheet
Description Summary
-
New Document
A-1
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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